| /external/libxaac/decoder/ |
| D | ixheaacd_qmf_dec.c | 361 VOID ixheaacd_sbr_qmfanal32_winadd_eld(WORD16 *inp1, WORD16 *inp2, in ixheaacd_sbr_qmfanal32_winadd_eld() argument
368 accu = ixheaacd_mult16x16in32(inp1[n + 0], p_qmf1[(n + 0)]); in ixheaacd_sbr_qmfanal32_winadd_eld()
370 accu, ixheaacd_mult16x16in32(inp1[n + 64], p_qmf1[(n + 64)])); in ixheaacd_sbr_qmfanal32_winadd_eld()
372 accu, ixheaacd_mult16x16in32(inp1[n + 128], p_qmf1[(n + 128)])); in ixheaacd_sbr_qmfanal32_winadd_eld()
374 accu, ixheaacd_mult16x16in32(inp1[n + 192], p_qmf1[(n + 192)])); in ixheaacd_sbr_qmfanal32_winadd_eld()
376 accu, ixheaacd_mult16x16in32(inp1[n + 256], p_qmf1[(n + 256)])); in ixheaacd_sbr_qmfanal32_winadd_eld()
379 accu = ixheaacd_mult16x16in32(inp1[n + 1 + 0], p_qmf1[(n + 1 + 0)]); in ixheaacd_sbr_qmfanal32_winadd_eld()
381 accu, ixheaacd_mult16x16in32(inp1[n + 1 + 64], p_qmf1[(n + 1 + 64)])); in ixheaacd_sbr_qmfanal32_winadd_eld()
383 accu, ixheaacd_mult16x16in32(inp1[n + 1 + 128], p_qmf1[(n + 1 + 128)])); in ixheaacd_sbr_qmfanal32_winadd_eld()
385 accu, ixheaacd_mult16x16in32(inp1[n + 1 + 192], p_qmf1[(n + 1 + 192)])); in ixheaacd_sbr_qmfanal32_winadd_eld()
[all …]
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| D | ixheaacd_qmf_dec.h | 86 VOID ixheaacd_esbr_qmfanal32_winadd(WORD32 *inp1, WORD32 *inp2,
181 VOID ixheaacd_sbr_qmfsyn64_winadd(WORD16 *tmp1, WORD16 *tmp2, WORD16 *inp1,
201 VOID ixheaacd_sbr_qmfanal32_winadd_eld(WORD16 *inp1, WORD16 *inp2,
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| /external/tensorflow/tensorflow/python/compiler/tensorrt/ |
| D | trt_convert_test.py | 90 def _GetGraph(cls, inp1, inp2, var): argument
93 add = inp1 + var
94 mul = inp1 * add
111 def run(self, inp1, inp2): argument
114 return TrtConvertTest._GetGraph(inp1, inp2, self.v)
121 inp1 = array_ops.placeholder(
126 out = TrtConvertTest._GetGraph(inp1, inp2, var)
127 return g, var, inp1, inp2, out
160 g, var, inp1, inp2, out = self._GetGraphForV1(device)
163 "myinput1": utils.build_tensor_info(inp1),
[all …]
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| /external/tensorflow/tensorflow/core/kernels/ |
| D | sparse_matmul_op.cc | 319 const float a3, const bfloat16** inp1, in ScalarMulAdd3Way() argument
322 float inp1_f = ConvertBfloat16ToFloat(*inp1); in ScalarMulAdd3Way()
327 ++*inp1; in ScalarMulAdd3Way()
333 const float a3, const float** inp1, in ScalarMulAdd3Way() argument
336 **out += a1 * **inp1 + a2 * **inp2 + a3 * **inp3; in ScalarMulAdd3Way()
338 ++*inp1; in ScalarMulAdd3Way()
428 auto inp1 = reinterpret_cast<const float*>(*binp1); in MulAdd3Way() local
433 const auto b1 = LOAD(inp1); in MulAdd3Way()
461 auto inp1 = reinterpret_cast<const float*>(*binp1); in TwoMulAdd3Way() local
466 const auto b1 = LOAD(inp1); in TwoMulAdd3Way()
[all …]
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | qpx-bv-sint.ll | 5 define void @s452(i32 %inp1) nounwind {
10 %conv.4 = sitofp i32 %inp1 to double
11 %conv.5 = sitofp i32 %inp1 to double
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| D | qpx-split-vsetcc.ll | 6 define void @gsl_sf_legendre_Pl_deriv_array(<4 x i32> %inp1, <4 x double> %inp2) #0 {
11 %0 = icmp ne <4 x i32> %inp1, zeroinitializer
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| D | subreg-postra.ll | 6 define void @jbd2_journal_commit_transaction(i32* %journal, i64 %inp1, i32 %inp2,
110 %tobool.i1295 = icmp eq i64 %inp1, 0
129 %tobool.i1316 = icmp eq i64 %inp1, 0
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| /external/libxaac/decoder/generic/ |
| D | ixheaacd_qmf_dec_generic.c | 506 VOID ixheaacd_sbr_qmfanal32_winadd(WORD16 *inp1, WORD16 *inp2, WORD16 *p_qmf1, in ixheaacd_sbr_qmfanal32_winadd() argument
513 accu = ixheaacd_mult16x16in32(inp1[n + 0], p_qmf1[2 * (n + 0)]); in ixheaacd_sbr_qmfanal32_winadd()
515 accu, ixheaacd_mult16x16in32(inp1[n + 64], p_qmf1[2 * (n + 64)])); in ixheaacd_sbr_qmfanal32_winadd()
517 accu, ixheaacd_mult16x16in32(inp1[n + 128], p_qmf1[2 * (n + 128)])); in ixheaacd_sbr_qmfanal32_winadd()
519 accu, ixheaacd_mult16x16in32(inp1[n + 192], p_qmf1[2 * (n + 192)])); in ixheaacd_sbr_qmfanal32_winadd()
521 accu, ixheaacd_mult16x16in32(inp1[n + 256], p_qmf1[2 * (n + 256)])); in ixheaacd_sbr_qmfanal32_winadd()
524 accu = ixheaacd_mult16x16in32(inp1[n + 1 + 0], p_qmf1[2 * (n + 1 + 0)]); in ixheaacd_sbr_qmfanal32_winadd()
527 ixheaacd_mult16x16in32(inp1[n + 1 + 64], p_qmf1[2 * (n + 1 + 64)])); in ixheaacd_sbr_qmfanal32_winadd()
530 ixheaacd_mult16x16in32(inp1[n + 1 + 128], p_qmf1[2 * (n + 1 + 128)])); in ixheaacd_sbr_qmfanal32_winadd()
533 ixheaacd_mult16x16in32(inp1[n + 1 + 192], p_qmf1[2 * (n + 1 + 192)])); in ixheaacd_sbr_qmfanal32_winadd()
[all …]
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| /external/libpng/mips/ |
| D | filter_msa_intrinsics.c | 353 #define CMP_AND_SELECT(inp0, inp1, inp2, inp3, inp4, inp5, out0) \ argument
357 _sel_h0 = (v8i16) __msa_clt_u_h((v8u16) inp1, (v8u16) inp0); \
359 inp0 = (v8i16) __msa_bmnz_v((v16u8) inp0, (v16u8) inp1, (v16u8) _sel_h0); \
550 int32_t inp0, inp1, out0; in png_read_filter_row_avg4_msa() local
556 inp1 = LW(src); in png_read_filter_row_avg4_msa()
559 src1 = (v16u8) __msa_insert_w((v4i32) zero, 0, inp1); in png_read_filter_row_avg4_msa()
602 int32_t inp0, inp1, out1; in png_read_filter_row_avg3_msa() local
611 inp1 = LW(src); in png_read_filter_row_avg3_msa()
614 src1 = (v16u8) __msa_insert_w((v4i32) zero, 0, inp1); in png_read_filter_row_avg3_msa()
661 int32_t inp0, inp1, res0; in png_read_filter_row_paeth4_msa() local
[all …]
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| /external/tensorflow/tensorflow/python/kernel_tests/ |
| D | identity_n_op_py_test.py | 41 inp1 = constant_op.constant([11, 21, 31, 41, 51, 61], shape=[3, 2])
45 array_ops.identity_n([inp0, inp1, inp2]))
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| D | rnn_cell_test.py | 1806 for inp1, inp2 in zip(flat_input1, flat_input2):
1807 input_shape = inp1.get_shape().as_list()
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| /external/tensorflow/tensorflow/python/ops/ |
| D | batch_ops_test.py | 135 inp1 = array_ops.placeholder(dtype=dtypes.int32, shape=[1])
137 [inp0, inp1],
148 inp1: [2]}))
152 main_results = sess.run([batched], feed_dict={inp0: [2], inp1: [3]})
176 inp1 = array_ops.placeholder(dtype=dtypes.int32, shape=[2])
178 [inp0, inp1], num_batch_threads=1, max_batch_size=2,
181 _ = sess.run([batched, index], feed_dict={inp0: [0], inp1: [1, 2]})
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| /external/tensorflow/tensorflow/python/compiler/tensorrt/test/ |
| D | batch_matmul_test.py | 60 def GraphFn(self, inp, inp1): argument
61 x1 = math_ops.matmul(inp, inp1, name="matmul")
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| /external/libaom/libaom/aom_dsp/mips/ |
| D | intrapred_msa.c | 106 uint8_t inp0, inp1, inp2, inp3; in intra_predict_horiz_16x16_msa() local
111 inp1 = src[1]; in intra_predict_horiz_16x16_msa()
117 src1 = (v16u8)__msa_fill_b(inp1); in intra_predict_horiz_16x16_msa()
129 uint8_t inp0, inp1, inp2, inp3; in intra_predict_horiz_32x32_msa() local
134 inp1 = src[1]; in intra_predict_horiz_32x32_msa()
140 src1 = (v16u8)__msa_fill_b(inp1); in intra_predict_horiz_32x32_msa()
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| /external/libxaac/decoder/armv8/ |
| D | ixheaacd_qmf_dec_armv8.c | 1147 VOID ixheaacd_esbr_qmfsyn64_winadd(WORD32 *tmp1, WORD32 *tmp2, WORD32 *inp1, in ixheaacd_esbr_qmfsyn64_winadd() argument
1155 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp1[0 + k], inp1[k + 0])); in ixheaacd_esbr_qmfsyn64_winadd()
1157 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp1[256 + k], inp1[k + 128])); in ixheaacd_esbr_qmfsyn64_winadd()
1159 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp1[512 + k], inp1[k + 256])); in ixheaacd_esbr_qmfsyn64_winadd()
1161 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp1[768 + k], inp1[k + 384])); in ixheaacd_esbr_qmfsyn64_winadd()
1163 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp1[1024 + k], inp1[k + 512])); in ixheaacd_esbr_qmfsyn64_winadd()
1166 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp2[128 + k], inp1[k + 64])); in ixheaacd_esbr_qmfsyn64_winadd()
1168 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp2[384 + k], inp1[k + 192])); in ixheaacd_esbr_qmfsyn64_winadd()
1170 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp2[640 + k], inp1[k + 320])); in ixheaacd_esbr_qmfsyn64_winadd()
1172 ixheaacd_add64(syn_out, ixheaacd_mult64(tmp2[896 + k], inp1[k + 448])); in ixheaacd_esbr_qmfsyn64_winadd()
[all …]
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| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | txfm_macros_msa.h | 82 #define MADD_BF(inp0, inp1, inp2, inp3, cst0, cst1, cst2, cst3, out0, out1, \ argument
88 ILVRL_H2_SH(inp1, inp0, madd_s0_m, madd_s1_m); \
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| D | intrapred_msa.c | 104 uint8_t inp0, inp1, inp2, inp3; in intra_predict_horiz_16x16_msa() local
109 inp1 = src[1]; in intra_predict_horiz_16x16_msa()
115 src1 = (v16u8)__msa_fill_b(inp1); in intra_predict_horiz_16x16_msa()
127 uint8_t inp0, inp1, inp2, inp3; in intra_predict_horiz_32x32_msa() local
132 inp1 = src[1]; in intra_predict_horiz_32x32_msa()
138 src1 = (v16u8)__msa_fill_b(inp1); in intra_predict_horiz_32x32_msa()
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| D | inv_txfm_msa.h | 195 #define VP9_MADD(inp0, inp1, inp2, inp3, cst0, cst1, cst2, cst3, out0, out1, \ argument
201 ILVRL_H2_SH(inp1, inp0, madd_s1_m, madd_s0_m); \
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| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | subreg-postra.ll | 7 define void @jbd2_journal_commit_transaction(i32* %journal, i64 %inp1, i32 %inp2,
111 %tobool.i1295 = icmp eq i64 %inp1, 0
130 %tobool.i1316 = icmp eq i64 %inp1, 0
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| /external/tensorflow/tensorflow/python/keras/ |
| D | callbacks_v1_test.py | 192 inp1 = input_layer.Input((INPUT_DIM,))
194 inp = layers.add([inp1, inp2])
199 model = training.Model([inp1, inp2], [output1, output2])
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| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_esbr_qmfsyn64_winadd.s | 4 @WORD32 *inp1,
9 @R2->Word32 *inp1
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| /external/libvpx/libvpx/third_party/libyuv/source/ |
| D | row_msa.cc | 2030 v16u8 inp0, inp1, inp2, inp3, inp4, inp5; in RGB24ToUVRow_MSA() local
2045 inp1 = (v16u8)__msa_ld_b((const v16i8*)s, 16); in RGB24ToUVRow_MSA()
2050 src1 = (v16u8)__msa_sldi_b((v16i8)inp1, (v16i8)inp0, 12); in RGB24ToUVRow_MSA()
2052 src2 = (v16u8)__msa_sldi_b((v16i8)inp2, (v16i8)inp1, 8); in RGB24ToUVRow_MSA()
2134 v16u8 inp0, inp1, inp2, inp3, inp4, inp5; in RAWToUVRow_MSA() local
2150 inp1 = (v16u8)__msa_ld_b((const v16i8*)s, 16); in RAWToUVRow_MSA()
2155 src1 = (v16u8)__msa_sldi_b((v16i8)inp1, (v16i8)inp0, 12); in RAWToUVRow_MSA()
2157 src2 = (v16u8)__msa_sldi_b((v16i8)inp2, (v16i8)inp1, 8); in RAWToUVRow_MSA()
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| /external/libyuv/files/source/ |
| D | row_msa.cc | 2030 v16u8 inp0, inp1, inp2, inp3, inp4, inp5; in RGB24ToUVRow_MSA() local
2045 inp1 = (v16u8)__msa_ld_b((void*)s, 16); in RGB24ToUVRow_MSA()
2050 src1 = (v16u8)__msa_sldi_b((v16i8)inp1, (v16i8)inp0, 12); in RGB24ToUVRow_MSA()
2052 src2 = (v16u8)__msa_sldi_b((v16i8)inp2, (v16i8)inp1, 8); in RGB24ToUVRow_MSA()
2134 v16u8 inp0, inp1, inp2, inp3, inp4, inp5; in RAWToUVRow_MSA() local
2150 inp1 = (v16u8)__msa_ld_b((void*)s, 16); in RAWToUVRow_MSA()
2155 src1 = (v16u8)__msa_sldi_b((v16i8)inp1, (v16i8)inp0, 12); in RAWToUVRow_MSA()
2157 src2 = (v16u8)__msa_sldi_b((v16i8)inp2, (v16i8)inp1, 8); in RAWToUVRow_MSA()
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| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | vector-shuffle-combining-avx2.ll | 819 define internal fastcc <8 x float> @PR34577(<8 x float> %inp0, <8 x float> %inp1, <8 x float> %inp2…
844 …%shuf2 = shufflevector <8 x float> %inp1, <8 x float> %shuf1, <8 x i32> <i32 15, i32 10, i32 7, i3…
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