Home
last modified time | relevance | path

Searched refs:insertq (Results 1 – 25 of 37) sorted by relevance

12

/external/llvm-project/llvm/test/tools/llvm-mca/X86/Barcelona/
Dresources-sse4a.s7 insertq %xmm0, %xmm2 label
8 insertq $22, $22, %xmm0, %xmm2 label
24 # CHECK-NEXT: 1 1 0.50 insertq %xmm0, %xmm2
25 # CHECK-NEXT: 1 1 0.50 insertq $22, $22, %xmm0, %xmm2
47 # CHECK-NEXT: - - - 0.50 - 0.50 - - insertq %xmm0, %xmm2
48 # CHECK-NEXT: - - - 0.50 - 0.50 - - insertq $22, $22, %xmm0, %xmm2
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Generic/
Dresources-sse4a.s7 insertq %xmm0, %xmm2 label
8 insertq $22, $22, %xmm0, %xmm2 label
24 # CHECK-NEXT: 1 1 0.50 insertq %xmm0, %xmm2
25 # CHECK-NEXT: 1 1 0.50 insertq $22, $22, %xmm0, %xmm2
47 # CHECK-NEXT: - - - 0.50 - 0.50 - - insertq %xmm0, %xmm2
48 # CHECK-NEXT: - - - 0.50 - 0.50 - - insertq $22, $22, %xmm0, %xmm2
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver2/
Dresources-sse4a.s7 insertq %xmm0, %xmm2 label
8 insertq $22, $22, %xmm0, %xmm2 label
24 # CHECK-NEXT: 1 4 1.00 insertq %xmm0, %xmm2
25 # CHECK-NEXT: 1 4 1.00 insertq $22, $22, %xmm0, %xmm2
52 … - - - - - - 0.50 1.00 - 0.50 - insertq %xmm0, %xmm2
53 … - - - - - 0.50 1.00 - 0.50 - insertq $22, $22, %xmm0, …
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BtVer2/
Dresources-sse4a.s7 insertq %xmm0, %xmm2 label
8 insertq $22, $22, %xmm0, %xmm2 label
24 # CHECK-NEXT: 1 2 2.00 insertq %xmm0, %xmm2
25 # CHECK-NEXT: 1 2 2.00 insertq $22, $22, %xmm0, %xmm2
53 … - - 0.50 0.50 - - - - 2.00 2.00 - insertq %xmm0, %xmm2
54 … - 0.50 0.50 - - - - 2.00 2.00 - insertq $22, $22, %xmm0, …
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Znver1/
Dresources-sse4a.s7 insertq %xmm0, %xmm2 label
8 insertq $22, $22, %xmm0, %xmm2 label
24 # CHECK-NEXT: 1 4 1.00 insertq %xmm0, %xmm2
25 # CHECK-NEXT: 1 4 1.00 insertq $22, $22, %xmm0, %xmm2
51 … - - - - - - 0.50 1.00 - 0.50 - insertq %xmm0, %xmm2
52 … - - - - - 0.50 1.00 - 0.50 - insertq $22, $22, %xmm0, …
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/
Dresources-sse4a.s7 insertq %xmm0, %xmm2 label
8 insertq $22, $22, %xmm0, %xmm2 label
24 # CHECK-NEXT: 1 3 1.00 insertq %xmm0, %xmm2
25 # CHECK-NEXT: 1 3 1.50 insertq $22, $22, %xmm0, %xmm2
62 … - - 0.50 0.50 - - - - - - - insertq %xmm0, %xmm2
63 … - 0.50 0.50 - - - - - - - insertq $22, $22, %xmm0, …
/external/llvm-project/llvm/test/MC/X86/
Dx86_64-sse4a.s11 insertq $6, $5, %xmm1, %xmm0 label
12 # CHECK: insertq $6, $5, %xmm1, %xmm0
15 insertq %xmm1, %xmm0 label
16 # CHECK: insertq %xmm1, %xmm0
DSSE4a-32.s13 insertq $0, $0, %xmm1, %xmm1 label
17 insertq %xmm1, %xmm1 label
DSSE4a-64.s13 insertq $0, $0, %xmm14, %xmm14 label
17 insertq %xmm14, %xmm14 label
/external/llvm/test/MC/X86/
Dx86_64-sse4a.s11 insertq $6, $5, %xmm1, %xmm0 label
12 # CHECK: insertq $6, $5, %xmm1, %xmm0
15 insertq %xmm1, %xmm0 label
16 # CHECK: insertq %xmm1, %xmm0
/external/llvm/test/CodeGen/X86/
Dsse4a.ll43 ; X32-NEXT: insertq $6, $5, %xmm1, %xmm0
48 ; X64-NEXT: insertq $6, $5, %xmm1, %xmm0
59 ; X32-NEXT: insertq %xmm1, %xmm0
64 ; X64-NEXT: insertq %xmm1, %xmm0
66 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
70 declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind
Dsse4a-intrinsics-fast-isel.ll43 ; X32-NEXT: insertq $6, $5, %xmm1, %xmm0
48 ; X64-NEXT: insertq $6, $5, %xmm1, %xmm0
58 ; X32-NEXT: insertq %xmm1, %xmm0
63 ; X64-NEXT: insertq %xmm1, %xmm0
65 %res = call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y)
68 declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind readnone
Dvector-shuffle-sse4a.ll194 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5,6,7],xmm0[u,u,u,u,u,u,u,u]
203 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3,4,5,6,7,u,u,u,u,u,u,u,u]
213 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
222 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
231 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3,4,5,6,7,u,u,u,u,u,u,u,u]
240 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
249 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1],xmm0[4,5,6,7,u,u,u,u,u,u,u,u]
258 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[0,1],xmm0[6,7,u,u,u,u,u,u,u,u]
267 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[0,1],xmm0[u,u,u,u,u,u,u,u]
276 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1,2,3],xmm0[6,7,u,u,u,u,u,u,u,u]
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dsse4a.ll100 ; CHECK-NEXT: insertq $6, $5, %xmm1, %xmm0 # encoding: [0xf2,0x0f,0x78,0xc1,0x05,0x06]
111 ; X86-SSE-NEXT: insertq $6, $5, %xmm0, %xmm1 # encoding: [0xf2,0x0f,0x78,0xc8,0x05,0x06]
119 ; X86-AVX-NEXT: insertq $6, $5, %xmm0, %xmm1 # encoding: [0xf2,0x0f,0x78,0xc8,0x05,0x06]
126 ; X64-SSE-NEXT: insertq $6, $5, %xmm0, %xmm1 # encoding: [0xf2,0x0f,0x78,0xc8,0x05,0x06]
133 ; X64-AVX-NEXT: insertq $6, $5, %xmm0, %xmm1 # encoding: [0xf2,0x0f,0x78,0xc8,0x05,0x06]
146 ; CHECK-NEXT: insertq %xmm1, %xmm0 # encoding: [0xf2,0x0f,0x79,0xc1]
148 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
157 ; X86-SSE-NEXT: insertq %xmm0, %xmm1 # encoding: [0xf2,0x0f,0x79,0xc8]
165 ; X86-AVX-NEXT: insertq %xmm0, %xmm1 # encoding: [0xf2,0x0f,0x79,0xc8]
172 ; X64-SSE-NEXT: insertq %xmm0, %xmm1 # encoding: [0xf2,0x0f,0x79,0xc8]
[all …]
Dsse4a-intrinsics-fast-isel.ll33 ; CHECK-NEXT: insertq $6, $5, %xmm1, %xmm0
43 ; CHECK-NEXT: insertq %xmm1, %xmm0
45 %res = call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y)
48 declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind readnone
Dvector-shuffle-sse4a.ll260 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3,4,5,6,7,u,u,u,u,u,u,u,u]
270 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
279 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,0,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
288 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3,4,5,6,7,u,u,u,u,u,u,u,u]
297 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
306 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1],xmm0[4,5,6,7,u,u,u,u,u,u,u,u]
315 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[0,1],xmm0[6,7,u,u,u,u,u,u,u,u]
324 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[0,1],xmm0[u,u,u,u,u,u,u,u]
333 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1,2,3],xmm0[6,7,u,u,u,u,u,u,u,u]
342 ; ALL-NEXT: insertq {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1,2,3,4,5],xmm0[u,u,u,u,u,u,u,u]
[all …]
Dvector-shuffle-combining-sse4a.ll80 ; CHECK-NEXT: insertq {{.*#+}} xmm0 = xmm0[0],xmm1[0,1],xmm0[3,4,5,6,7,u,u,u,u,u,u,u,u]
Dvector-shift-shl-sub128.ll1204 ; XOP-NEXT: insertq {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
Dvector-shift-lshr-sub128.ll1357 ; XOP-NEXT: insertq {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
/external/llvm/test/Transforms/InstCombine/
Dx86-sse4a.ll131 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64>…
134 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
143 …%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> <i64 8, i64 658>) nounwind
151 …%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> <i64 0, i64 0>, <2 x i64> <i64 8, i64 6…
159 …%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> <i64 1, i64 undef>, <2 x i64> <i64 8, i…
307 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64>…
311 %2 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %1, <2 x i64> %y) nounwind
319 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
370 ; CHECK: declare <2 x i64> @llvm.x86.sse4a.insertq
371 declare <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64>, <2 x i64>) nounwind
/external/llvm-project/llvm/test/Transforms/InstCombine/X86/
Dx86-sse4a.ll153 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2…
156 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
165 …%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> <i64 8, i64 658>) nounwind
173 …%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> <i64 0, i64 0>, <2 x i64> <i64 8, i64 6…
181 …%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> <i64 1, i64 undef>, <2 x i64> <i64 8, i…
190 …%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> bitcast (<16 x i8> trunc …
353 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> [[X:%.*]], <2…
357 %2 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %1, <2 x i64> %y) nounwind
365 %1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %x, <2 x i64> %y) nounwind
416 ; CHECK: declare <2 x i64> @llvm.x86.sse4a.insertq
[all …]
/external/llvm/test/MC/Disassembler/X86/
Dx86-64.txt71 # CHECK: insertq $6, $5, %xmm1, %xmm0
74 # CHECK: insertq %xmm1, %xmm0
Dx86-32.txt652 # CHECK: insertq $6, $5, %xmm1, %xmm0
655 # CHECK: insertq %xmm1, %xmm0
/external/llvm-project/llvm/test/MC/Disassembler/X86/
Dx86-64.txt77 # CHECK: insertq $6, $5, %xmm1, %xmm0
80 # CHECK: insertq %xmm1, %xmm0
Dx86-32.txt697 # CHECK: insertq $6, $5, %xmm1, %xmm0
700 # CHECK: insertq %xmm1, %xmm0

12