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/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SchedThunderX2T99.td400 def : InstRW<[THX2T99Write_1Cyc_I2], (instrs B, BL, BR, BLR)>;
401 def : InstRW<[THX2T99Write_1Cyc_I2], (instrs RET)>;
435 def : InstRW<[WriteI], (instrs COPY)>;
483 (instrs MOVKWi, MOVKXi, MOVNWi, MOVNXi, MOVZWi, MOVZXi)>;
486 (instrs ASRVWr, ASRVXr, LSLVWr, LSLVXr, RORVWr, RORVXr)>;
526 // (instrs MADDWrrr, MSUBWrrr)>;
527 def : InstRW<[WriteIM32], (instrs MADDWrrr, MSUBWrrr)>;
528 def : InstRW<[WriteIM32], (instrs MADDXrrr, MSUBXrrr)>;
532 def : InstRW<[WriteID32], (instrs SDIVWr, UDIVWr)>;
533 def : InstRW<[WriteID64], (instrs SDIVXr, UDIVXr)>;
[all …]
DAArch64SchedThunderX3T110.td660 def : InstRW<[THX3T110Write_1Cyc_I23], (instrs B, BL, BR, BLR)>;
661 def : InstRW<[THX3T110Write_1Cyc_I23], (instrs Bcc)>;
662 def : InstRW<[THX3T110Write_1Cyc_I23], (instrs RET)>;
664 (instrs CBZW, CBZX, CBNZW, CBNZX, TBZW, TBZX, TBNZW, TBNZX)>;
695 def : InstRW<[WriteI], (instrs COPY)>;
743 (instrs MOVKWi, MOVKXi, MOVNWi, MOVNXi, MOVZWi, MOVZXi)>;
746 (instrs ASRVWr, ASRVXr, LSLVWr, LSLVXr, RORVWr, RORVXr)>;
786 // (instrs MADDWrrr, MSUBWrrr)>;
787 def : InstRW<[WriteIM32], (instrs MADDWrrr, MSUBWrrr)>;
788 def : InstRW<[WriteIM32], (instrs MADDXrrr, MSUBXrrr)>;
[all …]
DAArch64SchedA57.td130 def : InstRW<[WriteI], (instrs COPY)>;
136 def : InstRW<[A57Write_1cyc_1B_1I], (instrs BL)>;
137 def : InstRW<[A57Write_2cyc_1B_1I], (instrs BLR)>;
153 def : InstRW<[A57Write_6cyc_1M], (instrs SMULHrr, UMULHrr)>;
159 def : InstRW<[A57Write_1cyc_1I], (instrs EXTRWrri)>;
160 def : InstRW<[A57Write_3cyc_1I_1M], (instrs EXTRXrri)>;
558 def : InstRW<[A57Write_32cyc_1W], (instrs FDIVDrr)>;
559 def : InstRW<[A57Write_17cyc_1W], (instrs FDIVSrr)>;
565 def : InstRW<[A57Write_32cyc_1W], (instrs FSQRTDr)>;
566 def : InstRW<[A57Write_17cyc_1W], (instrs FSQRTSr)>;
[all …]
DAArch64SchedFalkorDetails.td582 def : InstRW<[FalkorWr_1XYZ_1cyc], (instrs COPY)>;
599 def : InstRW<[FalkorWr_1VXVY_4cyc], (instrs FCVTXNv1i64)>;
605 (instrs FMULX32)>;
610 (instrs FMULX64)>;
616 def : InstRW<[FalkorWr_2VXVY_2cyc], (instrs FCVTLv4i16, FCVTLv2i32)>;
619 def : InstRW<[FalkorWr_1VX_1VY_10cyc],(instrs FDIVv2f32)>;
620 def : InstRW<[FalkorWr_1VX_1VY_12cyc],(instrs FSQRTv2f32)>;
625 def : InstRW<[FalkorWr_2VXVY_4cyc], (instrs FCVTLv8i16, FCVTLv4i32)>;
634 def : InstRW<[FalkorWr_3VXVY_4cyc], (instrs FCVTNv4i16, FCVTNv2i32, FCVTXNv2f32)>;
635 def : InstRW<[FalkorWr_3VXVY_5cyc], (instrs FCVTNv8i16, FCVTNv4i32, FCVTXNv4f32)>;
[all …]
DAArch64SchedKryoDetails.td99 (instrs SADDLVv4i32v, UADDLVv4i32v)>;
105 (instrs SADDLVv8i16v, UADDLVv8i16v)>;
111 (instrs SADDLVv16i8v, UADDLVv16i8v)>;
117 (instrs SADDLVv4i16v, UADDLVv4i16v, ADDVv4i16v)>;
123 (instrs SADDLVv8i8v, UADDLVv8i8v, ADDVv8i8v)>;
195 (instrs SMULHrr, UMULHrr)>;
339 (instrs ABSv1i64)>;
369 (instrs ADDv1i64)>;
393 (instrs ADDPv2i64p)>;
405 (instrs ADDVv4i32v)>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SchedThunderX2T99.td400 def : InstRW<[THX2T99Write_1Cyc_I2], (instrs B, BL, BR, BLR)>;
401 def : InstRW<[THX2T99Write_1Cyc_I2], (instrs RET)>;
435 def : InstRW<[WriteI], (instrs COPY)>;
483 (instrs MOVKWi, MOVKXi, MOVNWi, MOVNXi, MOVZWi, MOVZXi)>;
486 (instrs ASRVWr, ASRVXr, LSLVWr, LSLVXr, RORVWr, RORVXr)>;
526 // (instrs MADDWrrr, MSUBWrrr)>;
527 def : InstRW<[WriteIM32], (instrs MADDWrrr, MSUBWrrr)>;
528 def : InstRW<[WriteIM32], (instrs MADDXrrr, MSUBXrrr)>;
532 def : InstRW<[WriteID32], (instrs SDIVWr, UDIVWr)>;
533 def : InstRW<[WriteID64], (instrs SDIVXr, UDIVXr)>;
[all …]
DAArch64SchedA57.td129 def : InstRW<[WriteI], (instrs COPY)>;
135 def : InstRW<[A57Write_1cyc_1B_1I], (instrs BL)>;
136 def : InstRW<[A57Write_2cyc_1B_1I], (instrs BLR)>;
152 def : InstRW<[A57Write_6cyc_1M], (instrs SMULHrr, UMULHrr)>;
158 def : InstRW<[A57Write_1cyc_1I], (instrs EXTRWrri)>;
159 def : InstRW<[A57Write_3cyc_1I_1M], (instrs EXTRXrri)>;
557 def : InstRW<[A57Write_32cyc_1W], (instrs FDIVDrr)>;
558 def : InstRW<[A57Write_17cyc_1W], (instrs FDIVSrr)>;
564 def : InstRW<[A57Write_32cyc_1W], (instrs FSQRTDr)>;
565 def : InstRW<[A57Write_17cyc_1W], (instrs FSQRTSr)>;
[all …]
DAArch64SchedFalkorDetails.td582 def : InstRW<[FalkorWr_1XYZ_1cyc], (instrs COPY)>;
599 def : InstRW<[FalkorWr_1VXVY_4cyc], (instrs FCVTXNv1i64)>;
605 (instrs FMULX32)>;
610 (instrs FMULX64)>;
616 def : InstRW<[FalkorWr_2VXVY_2cyc], (instrs FCVTLv4i16, FCVTLv2i32)>;
619 def : InstRW<[FalkorWr_1VX_1VY_10cyc],(instrs FDIVv2f32)>;
620 def : InstRW<[FalkorWr_1VX_1VY_12cyc],(instrs FSQRTv2f32)>;
625 def : InstRW<[FalkorWr_2VXVY_4cyc], (instrs FCVTLv8i16, FCVTLv4i32)>;
634 def : InstRW<[FalkorWr_3VXVY_4cyc], (instrs FCVTNv4i16, FCVTNv2i32, FCVTXNv2f32)>;
635 def : InstRW<[FalkorWr_3VXVY_5cyc], (instrs FCVTNv8i16, FCVTNv4i32, FCVTXNv4f32)>;
[all …]
DAArch64SchedKryoDetails.td99 (instrs SADDLVv4i32v, UADDLVv4i32v)>;
105 (instrs SADDLVv8i16v, UADDLVv8i16v)>;
111 (instrs SADDLVv16i8v, UADDLVv16i8v)>;
117 (instrs SADDLVv4i16v, UADDLVv4i16v, ADDVv4i16v)>;
123 (instrs SADDLVv8i8v, UADDLVv8i8v, ADDVv8i8v)>;
195 (instrs SMULHrr, UMULHrr)>;
339 (instrs ABSv1i64)>;
369 (instrs ADDv1i64)>;
393 (instrs ADDPv2i64p)>;
405 (instrs ADDVv4i32v)>;
[all …]
/external/llvm-project/llvm/lib/Target/Mips/
DMipsScheduleGeneric.td47 def : InstRW<[GenericWriteALU], (instrs ADD, ADDi, ADDiu, ADDu, AND, ANDi,
53 def : InstRW<[GenericWriteALU], (instrs COPY)>;
59 def : InstRW<[GenericWriteALU], (instrs ADDIUPC, ALIGN, ALUIPC, AUI,
66 def : InstRW<[GenericWriteALU], (instrs AddiuRxImmX16, AddiuRxRxImm16,
82 def : InstRW<[GenericWriteALU], (instrs Constant32, LwConstant32,
88 def : InstRW<[GenericWriteALU], (instrs ADDIUPC_MM, ADDIUR1SP_MM, ADDIUR2_MM,
104 def : InstRW<[GenericWriteALU], (instrs ADDIUPC_MMR6, ADDIU_MMR6, ADDU16_MMR6,
119 def : InstRW<[GenericWriteALU], (instrs AND64, ANDi64, DEXT64_32, DSLL64_32,
124 def : InstRW<[GenericWriteALU], (instrs DADD, DADDi, DADDiu, DADDu, DCLO,
134 def : InstRW<[GenericWriteALU], (instrs DALIGN, DAHI, DATI, DAUI, DCLO_R6,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsScheduleGeneric.td47 def : InstRW<[GenericWriteALU], (instrs ADD, ADDi, ADDiu, ADDu, AND, ANDi,
53 def : InstRW<[GenericWriteALU], (instrs COPY)>;
59 def : InstRW<[GenericWriteALU], (instrs ADDIUPC, ALIGN, ALUIPC, AUI,
66 def : InstRW<[GenericWriteALU], (instrs AddiuRxImmX16, AddiuRxRxImm16,
82 def : InstRW<[GenericWriteALU], (instrs Constant32, LwConstant32,
88 def : InstRW<[GenericWriteALU], (instrs ADDIUPC_MM, ADDIUR1SP_MM, ADDIUR2_MM,
104 def : InstRW<[GenericWriteALU], (instrs ADDIUPC_MMR6, ADDIU_MMR6, ADDU16_MMR6,
119 def : InstRW<[GenericWriteALU], (instrs AND64, ANDi64, DEXT64_32, DSLL64_32,
124 def : InstRW<[GenericWriteALU], (instrs DADD, DADDi, DADDiu, DADDu, DCLO,
134 def : InstRW<[GenericWriteALU], (instrs DALIGN, DAHI, DATI, DAUI, DCLO_R6,
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64SchedA57.td128 def : InstRW<[WriteI], (instrs COPY)>;
134 def : InstRW<[A57Write_1cyc_1B_1I], (instrs BL)>;
135 def : InstRW<[A57Write_2cyc_1B_1I], (instrs BLR)>;
151 def : InstRW<[A57Write_6cyc_1M], (instrs SMULHrr, UMULHrr)>;
157 def : InstRW<[A57Write_1cyc_1I], (instrs EXTRWrri)>;
158 def : InstRW<[A57Write_3cyc_1I_1M], (instrs EXTRXrri)>;
554 def : InstRW<[A57Write_32cyc_1X], (instrs FDIVDrr)>;
555 def : InstRW<[A57Write_18cyc_1X], (instrs FDIVSrr)>;
561 def : InstRW<[A57Write_32cyc_1X], (instrs FSQRTDr)>;
562 def : InstRW<[A57Write_18cyc_1X], (instrs FSQRTSr)>;
[all …]
/external/minijail/
Dsyscall_filter_unittest_macros.h26 EXPECT_EQ((_block)->instrs->code, BPF_LD+BPF_W+BPF_ABS); \
32 EXPECT_EQ((_block)->instrs->code, BPF_LD+BPF_W+BPF_ABS); \
38 EXPECT_EQ((_block)->instrs->code, BPF_LD+BPF_W+BPF_ABS); \
66 EXPECT_JUMP_LBL(&(_block)->instrs[0]); \
67 EXPECT_LBL(&(_block)->instrs[1]); \
73 EXPECT_EQ_STMT((_block)->instrs, \
80 EXPECT_EQ_STMT((_block)->instrs, \
87 EXPECT_EQ_STMT((_block)->instrs, \
94 EXPECT_LBL(&(_block)->instrs[0]); \
95 EXPECT_EQ_STMT(&(_block)->instrs[1], \
/external/mesa3d/src/panfrost/bifrost/
Ddisassemble.c434 struct bifrost_alu_inst instrs[8] = {}; in dump_clause() local
473 instrs[idx + 1] = main_instr; in dump_clause()
474 instrs[idx].add_bits = bits(words[3], 0, 17) | ((tag & 0x7) << 17); in dump_clause()
475 instrs[idx].fma_bits |= bits(words[2], 19, 32) << 10; in dump_clause()
485 instrs[1] = main_instr; in dump_clause()
491 … instrs[2].add_bits = bits(words[3], 0, 17) | bits(words[3], 29, 32) << 17; in dump_clause()
492 instrs[2].fma_bits |= bits(words[2], 19, 32) << 10; in dump_clause()
502 … instrs[2].add_bits = bits(words[3], 0, 17) | bits(words[3], 29, 32) << 17; in dump_clause()
503 instrs[2].fma_bits |= bits(words[2], 19, 32) << 10; in dump_clause()
505 instrs[3] = main_instr; in dump_clause()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ScheduleAtom.td173 def : InstRW<[WriteMove], (instrs COPY)>;
500 def : InstRW<[AtomWrite0_1], (instrs FXAM, LD_Frr,
512 def : InstRW<[AtomWrite1_1], (instrs FCOMPP)>;
519 def : InstRW<[AtomWrite1_5], (instrs MMX_CVTPI2PSirr, MMX_CVTPI2PSirm,
527 def : InstRW<[AtomWrite0_1_1], (instrs POP32r, POP64r,
541 def : InstRW<[AtomWrite0_1_5], (instrs MMX_CVTPS2PIirm, MMX_CVTTPS2PIirm)>;
549 def : InstRW<[AtomWrite01_1], (instrs FDECSTP, FFREE, FFREEP, FINCSTP, WAIT,
561 def : InstRW<[AtomWrite01_2], (instrs LEAVE, LEAVE64, POP16r,
578 def : InstRW<[AtomWrite01_3], (instrs CLD, LDDQUrm,
594 def : InstRW<[AtomWrite01_4], (instrs CBW, CWD, CWDE, CDQ, CDQE, CQO,
[all …]
DX86SchedHaswell.td644 def : InstRW<[HWWriteXLAT], (instrs XLAT)>;
688 def : InstRW<[HWWriteINTO], (instrs INTO)>;
704 def : InstRW<[HWWriteMOVS], (instrs MOVSB, MOVSL, MOVSQ, MOVSW)>;
720 def : InstRW<[HWWriteRDPMC], (instrs RDPMC)>;
727 def : InstRW<[HWWriteRDRAND], (instrs RDRAND16r, RDRAND32r, RDRAND64r)>;
734 def : InstRW<[HWWriteP01], (instrs LD_Frr)>;
742 def : InstRW<[HWWriteFBLD], (instrs FBLDm)>;
755 def : InstRW<[HWWriteFNSAVE], (instrs FSAVEm)>;
761 def : InstRW<[HWWriteFRSTOR], (instrs FRSTORm)>;
767 def : InstRW<[HWWrite2P01], (instrs FCOMPP, UCOM_FPPr)>;
[all …]
DX86ScheduleBdVer2.td279 def : InstRW<[WriteMove], (instrs COPY)>;
306 def : InstRW<[PdWriteXLAT], (instrs XLAT)>;
338 def : InstRW<[PdWriteLXADD], (instrs LXADD8, LXADD16, LXADD32, LXADD64)>;
346 (instrs BLCFILL32rr, BLCFILL64rr, BLCI32rr, BLCI64rr,
358 (instrs BLCFILL32rm, BLCFILL64rm, BLCI32rm, BLCI64rm,
369 def : InstRW<[PdWriteADCSBB64ri32], (instrs ADC64ri32, SBB64ri32)>;
382 def : InstRW<[PdWriteCMPXCHG8rr], (instrs CMPXCHG8rr)>;
389 def : InstRW<[PdWriteCMPXCHG8rm], (instrs CMPXCHG8rm)>;
397 (instrs CMPXCHG16rm, CMPXCHG32rm, CMPXCHG64rm)>;
404 def : InstRW<[PdWriteCMPXCHG8B], (instrs CMPXCHG8B)>;
[all …]
DX86SchedBroadwell.td172 defm : X86WriteRes<WriteBitTest, [BWPort06], 1, [1], 1>; // Bit Test instrs
175 defm : X86WriteRes<WriteBitTestSet, [BWPort06], 1, [1], 1>; // Bit Test + Set instrs
214 def : InstRW<[WriteMove], (instrs COPY)>;
607 // Remaining instrs.
630 def: InstRW<[BWWriteResGroup3], (instrs MMX_MOVQ2DQrr)>;
644 def: InstRW<[BWWriteResGroup5], (instrs FINCSTP, FNOP)>;
651 def: InstRW<[BWWriteResGroup6], (instrs CDQ, CQO)>;
672 def: InstRW<[BWWriteResGroup9], (instrs SGDT64m,
683 def: InstRW<[BWWriteResGroup10], (instrs FBSTPm)>;
691 def: InstRW<[BWWriteResGroup12], (instrs FDECSTP)>;
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86ScheduleAtom.td173 def : InstRW<[WriteMove], (instrs COPY)>;
503 def : InstRW<[AtomWrite0_1], (instrs FXAM, LD_Frr,
515 def : InstRW<[AtomWrite1_1], (instrs FCOMPP)>;
522 def : InstRW<[AtomWrite1_5], (instrs MMX_CVTPI2PSirr, MMX_CVTPI2PSirm,
530 def : InstRW<[AtomWrite0_1_1], (instrs POP32r, POP64r,
544 def : InstRW<[AtomWrite0_1_5], (instrs MMX_CVTPS2PIirm, MMX_CVTTPS2PIirm)>;
552 def : InstRW<[AtomWrite01_1], (instrs FDECSTP, FFREE, FFREEP, FINCSTP, WAIT,
564 def : InstRW<[AtomWrite01_2], (instrs LEAVE, LEAVE64, POP16r,
581 def : InstRW<[AtomWrite01_3], (instrs CLD, LDDQUrm,
597 def : InstRW<[AtomWrite01_4], (instrs CBW, CWD, CWDE, CDQ, CDQE, CQO,
[all …]
DX86ScheduleBdVer2.td279 def : InstRW<[WriteMove], (instrs COPY)>;
306 def : InstRW<[PdWriteXLAT], (instrs XLAT)>;
338 def : InstRW<[PdWriteLXADD], (instrs LXADD8, LXADD16, LXADD32, LXADD64)>;
346 (instrs BLCFILL32rr, BLCFILL64rr, BLCI32rr, BLCI64rr,
358 (instrs BLCFILL32rm, BLCFILL64rm, BLCI32rm, BLCI64rm,
369 def : InstRW<[PdWriteADCSBB64ri32], (instrs ADC64ri32, SBB64ri32)>;
382 def : InstRW<[PdWriteCMPXCHG8rr], (instrs CMPXCHG8rr)>;
389 def : InstRW<[PdWriteCMPXCHG8rm], (instrs CMPXCHG8rm)>;
397 (instrs CMPXCHG16rm, CMPXCHG32rm, CMPXCHG64rm)>;
404 def : InstRW<[PdWriteCMPXCHG8B], (instrs CMPXCHG8B)>;
[all …]
DX86SchedHaswell.td647 def : InstRW<[HWWriteXLAT], (instrs XLAT)>;
691 def : InstRW<[HWWriteINTO], (instrs INTO)>;
707 def : InstRW<[HWWriteMOVS], (instrs MOVSB, MOVSL, MOVSQ, MOVSW)>;
723 def : InstRW<[HWWriteRDPMC], (instrs RDPMC)>;
730 def : InstRW<[HWWriteRDRAND], (instrs RDRAND16r, RDRAND32r, RDRAND64r)>;
737 def : InstRW<[HWWriteP01], (instrs LD_Frr)>;
745 def : InstRW<[HWWriteFBLD], (instrs FBLDm)>;
758 def : InstRW<[HWWriteFNSAVE], (instrs FSAVEm)>;
764 def : InstRW<[HWWriteFRSTOR], (instrs FRSTORm)>;
770 def : InstRW<[HWWrite2P01], (instrs FCOMPP, UCOM_FPPr)>;
[all …]
DX86SchedBroadwell.td172 defm : X86WriteRes<WriteBitTest, [BWPort06], 1, [1], 1>; // Bit Test instrs
175 defm : X86WriteRes<WriteBitTestSet, [BWPort06], 1, [1], 1>; // Bit Test + Set instrs
214 def : InstRW<[WriteMove], (instrs COPY)>;
610 // Remaining instrs.
633 def: InstRW<[BWWriteResGroup3], (instrs MMX_MOVQ2DQrr)>;
647 def: InstRW<[BWWriteResGroup5], (instrs FINCSTP, FNOP)>;
654 def: InstRW<[BWWriteResGroup6], (instrs CDQ, CQO)>;
675 def: InstRW<[BWWriteResGroup9], (instrs SGDT64m,
686 def: InstRW<[BWWriteResGroup10], (instrs FBSTPm)>;
694 def: InstRW<[BWWriteResGroup12], (instrs FDECSTP)>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DP9InstrResources.td37 (instrs
90 (instrs
106 (instrs
123 (instrs
178 (instrs
206 (instrs
291 (instrs
400 (instrs
408 (instrs
453 (instrs
[all …]
/external/llvm-project/llvm/lib/Target/PowerPC/
DP9InstrResources.td37 (instrs
90 (instrs
106 (instrs
123 (instrs
178 (instrs
206 (instrs
291 (instrs
401 (instrs
409 (instrs
454 (instrs
[all …]
/external/llvm-project/llvm/test/TableGen/
DCodeGenSchedule-duplicate-instrw.td13 def : InstRW<[WriteA], (instrs COPY)>;
15 def : InstRW<[WriteB], (instrs COPY)>;
16 …@LINE-1]]:3: error: Overlapping InstRW definition for "COPY" also matches previous "(instrs COPY)".
17 // CHECK-NEXT: def : InstRW<[WriteB], (instrs COPY)>;
20 // CHECK-NEXT: def : InstRW<[WriteA], (instrs COPY)>;

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