Searched refs:is16BitMode (Results 1 – 7 of 7) sorted by relevance
142 static unsigned getRelaxedOpcodeBranch(const MCInst &Inst, bool is16BitMode) { in getRelaxedOpcodeBranch() argument148 return (is16BitMode) ? X86::JAE_2 : X86::JAE_4; in getRelaxedOpcodeBranch()150 return (is16BitMode) ? X86::JA_2 : X86::JA_4; in getRelaxedOpcodeBranch()152 return (is16BitMode) ? X86::JBE_2 : X86::JBE_4; in getRelaxedOpcodeBranch()154 return (is16BitMode) ? X86::JB_2 : X86::JB_4; in getRelaxedOpcodeBranch()156 return (is16BitMode) ? X86::JE_2 : X86::JE_4; in getRelaxedOpcodeBranch()158 return (is16BitMode) ? X86::JGE_2 : X86::JGE_4; in getRelaxedOpcodeBranch()160 return (is16BitMode) ? X86::JG_2 : X86::JG_4; in getRelaxedOpcodeBranch()162 return (is16BitMode) ? X86::JLE_2 : X86::JLE_4; in getRelaxedOpcodeBranch()164 return (is16BitMode) ? X86::JL_2 : X86::JL_4; in getRelaxedOpcodeBranch()[all …]
52 bool is16BitMode(const MCSubtargetInfo &STI) const { in is16BitMode() function in __anon2747d3f40111::X86MCCodeEmitter64 if (is16BitMode(STI) && BaseReg.getReg() == 0 && in Is16BitMemOperand()1064 if ((TSFlags & X86II::OpSizeMask) == (is16BitMode(STI) ? X86II::OpSize32 in emitOpcodePrefix()1164 if ((is16BitMode(STI) && AdSize == X86II::AdSize32) || in encodeInstruction()1177 assert(is16BitMode(STI)); in encodeInstruction()
181 static unsigned getRelaxedOpcodeBranch(const MCInst &Inst, bool is16BitMode) { in getRelaxedOpcodeBranch() argument187 return (is16BitMode) ? X86::JCC_2 : X86::JCC_4; in getRelaxedOpcodeBranch()189 return (is16BitMode) ? X86::JMP_2 : X86::JMP_4; in getRelaxedOpcodeBranch()278 static unsigned getRelaxedOpcode(const MCInst &Inst, bool is16BitMode) { in getRelaxedOpcode() argument282 return getRelaxedOpcodeBranch(Inst, is16BitMode); in getRelaxedOpcode()620 bool is16BitMode = STI.getFeatureBits()[X86::Mode16Bit]; in relaxInstruction() local621 unsigned RelaxedOp = getRelaxedOpcode(Inst, is16BitMode); in relaxInstruction()
973 bool is16BitMode() const { in is16BitMode() function in __anon7e5fbfb70111::X86AsmParser989 if (is16BitMode()) return 16; in getPointerWidth()2665 if (PatchedName == "data16" && is16BitMode()) { in ParseInstruction()2763 if (Name != "mov" && Name[3] == (is16BitMode() ? 'l' : 'w')) { in ParseInstruction()2764 Name = is16BitMode() ? "movw" : "movl"; in ParseInstruction()2769 getX86SubSuperRegisterOrZero(Op1.getReg(), is16BitMode() ? 16 : 32); in ParseInstruction()3473 : (is32BitMode()) ? "l" : (is16BitMode()) ? "w" : " "; in MatchAndEmitIntelInstruction()3700 if (!is16BitMode()) { in ParseDirectiveCode()3708 if (!is16BitMode()) { in ParseDirectiveCode()
1202 bool is16BitMode() const { in is16BitMode() function in __anona5c84dc30111::X86AsmParser1218 if (is16BitMode()) return 16; in getPointerWidth()3312 if (PatchedName == "data16" && is16BitMode()) { in ParseInstruction()3424 if (Name != "mov" && Name[3] == (is16BitMode() ? 'l' : 'w')) { in ParseInstruction()3425 Name = is16BitMode() ? "movw" : "movl"; in ParseInstruction()3430 getX86SubSuperRegisterOrZero(Op1.getReg(), is16BitMode() ? 16 : 32); in ParseInstruction()3570 Inst.setOpcode(is16BitMode() ? X86::JMP_2 : X86::JMP_4); in processInstruction()3580 Inst.setOpcode(is16BitMode() ? X86::JCC_2 : X86::JCC_4); in processInstruction()4453 : (is32BitMode()) ? "l" : (is16BitMode()) ? "w" : " "; in MatchAndEmitIntelInstruction()4731 if (!is16BitMode()) { in ParseDirectiveCode()[all …]
261 bool is16BitMode() const { in is16BitMode() function in llvm::__anon484de05c0111::X86AddressSanitizer266 if (is16BitMode()) return 16; in getPointerWidth()
768 bool is16BitMode() const { in is16BitMode() function in __anond14900950111::X86AsmParser784 if (is16BitMode()) return 16; in getPointerWidth()3006 if (!is16BitMode()) { in ParseDirectiveCode()