| /external/swiftshader/third_party/subzero/src/ |
| D | IceRegistersARM32.h | 31 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
45 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
56 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
67 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
78 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
118 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumGPRegs() argument
133 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumGPRs() argument
168 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumSRegs() argument
169 +(isFP32) in getNumSRegs()
188 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getNumDRegs() argument
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| D | IceRegistersMIPS32.h | 31 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
45 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
57 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
|
| D | IceInstMIPS32.def | 41 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
113 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
180 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
188 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
216 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
220 isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
260 isFP32, isFP64, isVec128, alias_init */ \
267 // isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
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| D | IceInstARM32.def | 38 // isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init)
46 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init */ \
53 // isGPR, isInt, isFP32, isFP64, isVec128, alias_init)
|
| D | IceTargetLoweringARM32.cpp | 110 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
116 isFP32, isFP64, \
248 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
257 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
266 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
275 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
284 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
1184 isGPR, isInt, isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getPhysicalRegister() argument
1185 (isFP32) \ in getPhysicalRegister()
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| D | IceTargetLoweringMIPS32.cpp | 154 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in staticInit() argument
157 Float32Registers[RegMIPS32::val] = isFP32; \ in staticInit()
1023 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ argument
2331 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ in getRegisterSet() argument
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| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 318 bool isFP32() const { return isReg(FP32Reg); } in isFP32() function in __anond03072c70111::SystemZOperand
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 354 bool isFP32() const { return isReg(FP32Reg); } in isFP32() function in __anon841d33e90111::SystemZOperand
|
| /external/llvm-project/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 352 bool isFP32() const { return isReg(FP32Reg); } in isFP32() function in __anon10090df50111::SystemZOperand
|