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Searched refs:isLegalAddressingMode (Results 1 – 25 of 120) sorted by relevance

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/external/llvm/include/llvm/Analysis/
DTargetTransformInfoImpl.h204 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, in isLegalAddressingMode() function
223 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, in getScalingFactorCost()
481 if (static_cast<T *>(this)->isLegalAddressingMode( in getGEPCost()
DTargetTransformInfo.h329 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
651 virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
799 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, in isLegalAddressingMode() function
802 return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, in isLegalAddressingMode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.h73 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/lib/Target/ARC/
DARCISelLowering.h73 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/test/CodeGen/Thumb/
Daddr-modes.ll6 ; "ARMTargetLowering::isLegalAddressingMode can accept incorrect
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h57 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dis-legal-void.ll6 ; cause an assert in isLegalAddressingMode. Make sure we no longer crash.
/external/llvm/lib/Target/AVR/
DAVRISelLowering.h82 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h66 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h67 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm/lib/Analysis/
DTargetTransformInfo.cpp117 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, in isLegalAddressingMode() function in TargetTransformInfo
122 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, in isLegalAddressingMode()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Analysis/
DTargetTransformInfoImpl.h230 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
296 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, in getScalingFactorCost()
797 if (static_cast<T *>(this)->isLegalAddressingMode( in getGEPCost()
DTargetTransformInfo.h561 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
1223 virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
1502 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, in isLegalAddressingMode() function
1506 return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, in isLegalAddressingMode()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelLowering.h91 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/lib/Target/AVR/
DAVRISelLowering.h91 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/test/Transforms/LoopStrengthReduce/
Dillegal-addr-modes.ll8 ; "ARMTargetLowering::isLegalAddressingMode can accept incorrect
14 ; Due to a bug in ARMTargetLowering::isLegalAddressingMode LSR got
/external/llvm-project/llvm/lib/Target/XCore/
DXCoreISelLowering.h123 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.h125 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelLowering.h124 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.h86 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/include/llvm/Analysis/
DTargetTransformInfoImpl.h182 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
248 if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale, in getScalingFactorCost()
839 if (static_cast<T *>(this)->isLegalAddressingMode(
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.h68 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
/external/llvm-project/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/
Dpreserve-addrspace-assert.ll3 ; Test for assert resulting from inconsistent isLegalAddressingMode
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.h232 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVISelLowering.h93 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,

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