Searched refs:isSALU (Results 1 – 17 of 17) sorted by relevance
217 (pred->isSALU() && Salu)); in handle_raw_hazard_internal()339 } else if (instr->isSALU()) { in handle_instruction_gfx6()405 if (!instr->isSALU() && instr->format != Format::SMEM) in handle_instruction_gfx6()473 } else if (instr->isSALU() && !instr->definitions.empty()) { in handle_instruction_gfx6()604 } else if (instr->isSALU() || instr->format == Format::SMEM) { in handle_instruction_gfx10()694 } else if (instr->isSALU()) { in handle_instruction_gfx10()
792 else if (instr->isVALU() || instr->isSALU()) in get_operand_size()818 if (instr->isSALU() || instr->isVALU() || instr->format == Format::PSEUDO) { in label_instruction()846 if (instr->isSALU() || instr->format == Format::PSEUDO) { in label_instruction()3105 if (!instr->isSALU() && !instr->isVALU()) in select_instruction()3135 if (instr->isSALU() || (ctx.program->chip_class >= GFX10 && can_use_VOP3(ctx, instr))) in select_instruction()3239 if (instr->isSALU() || instr->isVALU()) { in apply_literals()
100 if (instr->isSALU()) in pred_by_exec_mask()102 if (instr->format == Format::SMEM || instr->isSALU()) in pred_by_exec_mask()
228 if (instr->isSALU() || instr->isVALU()) { in validate_ir()
926 constexpr bool isSALU() const noexcept in isSALU() function
807 bool isSALU(const SUnit *SU) const { in isSALU() function809 return MI && TII->isSALU(*MI) && !MI->isTerminator(); in isSALU()871 if (Succ != SU && isSALU(Succ) && canAddEdge(From, Succ)) in linkSALUChain()914 if (!isSALU(&*LastSALU) || !canAddEdge(&*LastSALU, &SU)) in apply()
578 auto IsBufferHazardDefFn = [this] (MachineInstr *MI) { return TII.isSALU(*MI); }; in checkSMRDHazards()854 return TII->isSALU(*MI); in checkReadM0Hazards()909 if (!SIInstrInfo::isSALU(*MI) && !SIInstrInfo::isSMRD(*MI)) in fixVMEMtoScalarWriteHazards()991 if (TII->isSALU(*MI)) { in fixSMEMtoVectorWriteHazards()
339 static bool isSALU(const MachineInstr &MI) { in isSALU() function343 bool isSALU(uint16_t Opcode) const { in isSALU() function
440 if (TII->isSALU(MI->getOpcode())) { in tryAddToFoldList()
3251 return !isSALU(MI) || MI.readsRegister(AMDGPU::EXEC, &RI); in mayReadEXEC()3626 SIInstrInfo::isSALU(MI) || in shouldReadExec()6780 if (isVALU(MI) || isSALU(MI)) { in getInstSizeInBytes()
811 bool isSALU(const SUnit *SU) const { in isSALU() function813 return MI && TII->isSALU(*MI) && !MI->isTerminator(); in isSALU()875 if (Succ != SU && isSALU(Succ) && canAddEdge(From, Succ)) in linkSALUChain()918 if (!isSALU(&*LastSALU) || !canAddEdge(&*LastSALU, &SU)) in apply()
550 auto IsBufferHazardDefFn = [this] (MachineInstr *MI) { return TII.isSALU(*MI); }; in checkSMRDHazards()853 return TII->isSALU(*MI); in checkReadM0Hazards()908 if (!SIInstrInfo::isSALU(*MI) && !SIInstrInfo::isSMRD(*MI)) in fixVMEMtoScalarWriteHazards()987 if (TII->isSALU(*MI)) { in fixSMEMtoVectorWriteHazards()
333 static bool isSALU(const MachineInstr &MI) { in isSALU() function337 bool isSALU(uint16_t Opcode) const { in isSALU() function
433 if (TII->isSALU(MI->getOpcode())) { in tryAddToFoldList()
2816 return !isSALU(MI) || MI.readsRegister(AMDGPU::EXEC, &RI); in mayReadEXEC()3182 SIInstrInfo::isSALU(MI) || in shouldReadExec()6001 if (isVALU(MI) || isSALU(MI)) { in getInstSizeInBytes()
183 static bool isSALU(const MachineInstr &MI) { in isSALU() function187 bool isSALU(uint16_t Opcode) const { in isSALU() function
1641 SIInstrInfo::isSALU(MI) || in shouldReadExec()3108 if (isVALU(MI) || isSALU(MI)) { in getInstSizeInBytes()