Searched refs:is_g4x (Results 1 – 25 of 27) sorted by relevance
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| /external/igt-gpu-tools/assembler/ |
| D | brw_context.h | 51 bool is_g4x; member
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| D | brw_eu_emit.c | 695 } else if (intel->is_g4x) { in brw_set_dp_read_message()
736 } else if (intel->is_g4x) { in brw_set_sampler_message()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_gen_enum.h | 50 case 4: return devinfo->is_g4x ? GEN45 : GEN4; in gen_from_devinfo()
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| D | brw_eu.h | 392 else if (devinfo->is_g4x) in brw_sampler_desc()
417 else if (devinfo->gen >= 5 || devinfo->is_g4x) in brw_sampler_desc_msg_type()
437 assert(devinfo->gen == 4 && !devinfo->is_g4x); in brw_sampler_desc_return_format()
509 else if (devinfo->gen >= 5 || devinfo->is_g4x) in brw_dp_read_desc()
526 else if (devinfo->gen >= 5 || devinfo->is_g4x) in brw_dp_read_desc_msg_type()
538 else if (devinfo->gen >= 5 || devinfo->is_g4x) in brw_dp_read_desc_msg_control()
770 } else if (devinfo->gen > 4 || devinfo->is_g4x) { in brw_dp_dword_scattered_rw_desc()
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| D | brw_inst.h | 96 } else if (devinfo->is_g4x) { \
302 FC(mask_control_ex, /* 4+ */ 28, 28, /* 12+ */ -1, -1, devinfo->is_g4x || devinfo->gen == 5)
918 …er_return_format, /* 4+ */ MD(13), MD(12), /* 12+ */ -1, -1, devinfo->gen == 4 && !devinfo->is_g4x)
1394 FC(mask_control_ex, /* 4+ */ 23, 23, /* 12+ */ -1, -1, devinfo->is_g4x || devinfo->gen == 5)
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| D | brw_eu_compact.c | 2171 assert(devinfo->gen == 5 || devinfo->is_g4x); in update_gen4_jump_count()
2177 int shift = devinfo->is_g4x ? 1 : 0; in update_gen4_jump_count()
2287 if (devinfo->gen == 4 && !devinfo->is_g4x) in brw_compact_instructions()
2320 if ((offset & sizeof(brw_compact_inst)) != 0 && devinfo->is_g4x){ in brw_compact_instructions()
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| D | brw_clip_util.c | 427 if (p->devinfo->gen == 5 || p->devinfo->is_g4x) in brw_clip_init_clipmask()
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| D | brw_disasm.c | 1905 if (!devinfo->is_g4x) { in brw_disassemble_inst()
1925 bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x; in brw_disassemble_inst()
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| D | brw_vec4_generator.cpp | 1161 else if (devinfo->gen == 5 || devinfo->is_g4x) in generate_scratch_read()
1305 else if (devinfo->gen == 5 || devinfo->is_g4x) in generate_pull_constant_load()
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| D | brw_fs_generator.cpp | 282 if (devinfo->gen == 4 && !devinfo->is_g4x) { in patch_discard_jumps_to_fb_writes()
2226 assert(devinfo->gen == 5 || devinfo->is_g4x || inst->exec_size == 8); in generate_code()
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| D | brw_eu_validate.c | 900 if ((devinfo->gen > 4 || devinfo->is_g4x) && dst_type_is_byte) { in general_restrictions_based_on_operand_types()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_misc_state.c | 290 const unsigned len = (devinfo->is_g4x || devinfo->gen == 5) ? 6 : 5; in brw_emit_depth_stencil_hiz()
310 if (devinfo->is_g4x || devinfo->gen >= 5) in brw_emit_depth_stencil_hiz()
472 const bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x; in brw_emit_select_pipeline()
701 const bool is_965 = devinfo->gen == 4 && !devinfo->is_g4x; in brw_upload_invariant_state()
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| D | brw_pipe_control.c | 422 devinfo->is_g4x ? gen45_emit_raw_pipe_control in brw_init_pipe_control()
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| D | brw_urb.c | 160 } else if (devinfo->is_g4x) { in brw_calculate_urb_fence()
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| D | brw_curbe.c | 334 if (devinfo->gen == 4 && !devinfo->is_g4x && in brw_upload_constant_buffer()
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| D | brw_surface_formats.c | 216 if (devinfo->is_g4x || devinfo->is_haswell) in intel_screen_init_surface_formats()
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| D | intel_extensions.c | 167 if (devinfo->is_g4x || devinfo->gen >= 5) { in intelInitExtensions()
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| D | brw_state_upload.c | 328 else if (devinfo->is_g4x) in brw_init_state()
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| D | brw_blorp.c | 81 if (devinfo->is_g4x) { in brw_blorp_init()
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| D | brw_context.c | 630 if (devinfo->gen >= 5 || devinfo->is_g4x) in brw_initialize_context_constants()
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| /external/mesa3d/src/intel/dev/ |
| D | gen_device_info.h | 53 bool is_g4x; member
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| D | gen_device_info.c | 112 .is_g4x = true,
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| /external/mesa3d/prebuilt-intermediates/genxml/ |
| D | genX_bits.h | 821 if (devinfo->is_g4x) { in _3DPRIMITIVE_IndirectVertexCount_bits()
849 if (devinfo->is_g4x) { in _3DPRIMITIVE_IndirectVertexCount_start()
1129 if (devinfo->is_g4x) { in _3DPRIMITIVE_StartInstanceLocation_bits()
1164 if (devinfo->is_g4x) { in _3DPRIMITIVE_StartInstanceLocation_start()
1954 if (devinfo->is_g4x) { in _3DSTATE_AA_LINE_PARAMETERS_length()
1992 if (devinfo->is_g4x) { in _3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits()
2027 if (devinfo->is_g4x) { in _3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start()
2065 if (devinfo->is_g4x) { in _3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits()
2100 if (devinfo->is_g4x) { in _3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start()
2138 if (devinfo->is_g4x) { in _3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits()
[all …]
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| /external/mesa3d/src/intel/isl/ |
| D | isl.h | 71 #define ISL_DEV_IS_G4X(__dev) ((__dev)->info->is_g4x)
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| D | isl_format.c | 678 return devinfo->gen * 10 + (devinfo->is_g4x || devinfo->is_haswell) * 5; in format_gen()
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