Searched refs:kFormatVnB (Results 1 – 7 of 7) sorted by relevance
| /external/vixl/src/aarch64/ |
| D | instructions-aarch64.cc | 1023 return kFormatVnB; in VectorFormatHalfWidth()
1098 return kFormatVnB; in VectorFormatHalfWidthDoubleLanes()
1160 case kFormatVnB: in IsSVEFormat()
1175 return kFormatVnB; in SVEFormatFromLaneSizeInBytes()
1266 case kFormatVnB: in LaneSizeInBitsFromFormat()
1304 case kFormatVnB: in LaneSizeInBytesLog2FromFormat()
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| D | logic-aarch64.cc | 6204 int first_pg = GetFirstActive(kFormatVnB, pg); in pfirst()
6205 VIXL_ASSERT(first_pg < LaneCountFromFormat(kFormatVnB)); in pfirst()
6207 if (first_pg >= 0) dst.SetActive(kFormatVnB, first_pg, true); in pfirst()
6350 dup_immediate(kFormatVnB, zero, 0); in FTMaddHelper()
7108 for (int i = 0; i < LaneCountFromFormat(kFormatVnB); i++) { in brka()
7109 if (pg.IsActive(kFormatVnB, i)) { in brka()
7110 pd.SetActive(kFormatVnB, i, !break_); in brka()
7111 break_ |= pn.IsActive(kFormatVnB, i); in brka()
7122 for (int i = 0; i < LaneCountFromFormat(kFormatVnB); i++) { in brkb()
7123 if (pg.IsActive(kFormatVnB, i)) { in brkb()
[all …]
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| D | instructions-aarch64.h | 206 kFormatVnB = SVE_B | kFormatSVE, enumerator
306 return kFormatVnB; in GetSVEVectorFormat()
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| D | simulator-aarch64.cc | 369 dup_immediate(kFormatVnB, ones, 0xff); in ExpandToSimVRegister()
370 mov_zeroing(kFormatVnB, result, pg, ones); in ExpandToSimVRegister()
378 dup_immediate(kFormatVnB, zero, 0); in ExtractFromSimVRegister()
705 case kFormatVnB: in GetPrintRegisterFormat()
9486 if ((format == kFormatVnB) && (shift == 8)) { in VisitSVEBroadcastIntImm_Unpredicated()
10059 vform = kFormatVnB; in VisitSVEContiguousNonTemporalLoad_ScalarPlusImm()
10093 vform = kFormatVnB; in VisitSVEContiguousNonTemporalLoad_ScalarPlusScalar()
10130 vform = kFormatVnB; in VisitSVELoadAndBroadcastQuadword_ScalarPlusImm()
10161 vform = kFormatVnB; in VisitSVELoadAndBroadcastQuadword_ScalarPlusScalar()
10492 vform = kFormatVnB; in VisitSVEContiguousNonTemporalStore_ScalarPlusImm()
[all …]
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| D | disasm-aarch64.cc | 6000 if ((instr->GetSVEVectorFormat() == kFormatVnB) && in VisitSVEBroadcastIntImm_Unpredicated()
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| /external/vixl/test/aarch64/ |
| D | test-api-aarch64.cc | 296 VIXL_CHECK(ZRegister(0, kFormatVnB).Is(z0.VnB())); in TEST()
311 VIXL_CHECK(PRegisterWithLaneSize(0, kFormatVnB).Is(p0.VnB())); in TEST()
1566 temps.Include(ZRegister(17, kFormatVnB)); in TEST()
1598 temps.Exclude(ZRegister(17, kFormatVnB)); in TEST()
1651 temps.Include(PRegisterWithLaneSize(12, kFormatVnB)); in TEST()
1683 temps.Exclude(PRegisterWithLaneSize(12, kFormatVnB)); in TEST()
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| D | test-trace-aarch64.cc | 3023 reg.SetActive(kFormatVnB, bit, ((bit + 1) % (r + 2)) != 0); in TraceTestHelper()
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