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Searched refs:kOutputs_Sadd16_GE_al_r12_r0_r10 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-ge-sadd16-t32.h37 const Inputs kOutputs_Sadd16_GE_al_r12_r0_r10[] = { variable
241 ARRAY_SIZE(kOutputs_Sadd16_GE_al_r12_r0_r10),
242 kOutputs_Sadd16_GE_al_r12_r0_r10,
Dsimulator-cond-rd-rn-rm-ge-sadd16-a32.h37 const Inputs kOutputs_Sadd16_GE_al_r12_r0_r10[] = { variable
241 ARRAY_SIZE(kOutputs_Sadd16_GE_al_r12_r0_r10),
242 kOutputs_Sadd16_GE_al_r12_r0_r10,