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Searched refs:l5 (Results 1 – 25 of 165) sorted by relevance

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/external/clang/test/SemaCXX/
Dexceptions.cpp39 goto l5; in jumps()
46 goto l5; in jumps()
53 goto l5; in jumps()
60 goto l5; in jumps()
66 l5: in jumps()
67 goto l5; in jumps()
/external/llvm-project/clang/test/SemaCXX/
Dexceptions.cpp44 goto l5; in jumps()
51 goto l5; in jumps()
58 goto l5; in jumps()
65 goto l5; in jumps()
71 l5: in jumps()
72 goto l5; in jumps()
/external/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
24 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
35 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
47 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
58 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
69 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
80 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
91 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
102 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
113 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
/external/llvm-project/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
24 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
35 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
47 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
58 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
69 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
80 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
91 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
102 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
113 …,~{g1},~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~…
/external/clang/test/CodeGenObjC/
Dproperty-complex.m48 _Complex float l5 = a0->iv0;
57 printf("l5: %.2f + %.2fi\n", __real l5, __imag l5);
/external/llvm/test/MC/Sparc/
Dsparc-coproc.s53 ! CHECK: ld [%l4+%l5], %csr ! encoding: [0xc1,0x8d,0x00,0x15]
56 ld [%l4+%l5], %csr
68 ! CHECK: std %cq, [%o3+%l5] ! encoding: [0xc1,0xb2,0xc0,0x15]
71 std %cq, [%o3+%l5]
/external/llvm-project/clang/test/CodeGenObjC/
Dproperty-complex.m48 _Complex float l5 = a0->iv0;
57 printf("l5: %.2f + %.2fi\n", __real l5, __imag l5);
/external/llvm-project/llvm/test/MC/Sparc/
Dsparc-coproc.s53 ! CHECK: ld [%l4+%l5], %csr ! encoding: [0xc1,0x8d,0x00,0x15]
56 ld [%l4+%l5], %csr
68 ! CHECK: std %cq, [%o3+%l5] ! encoding: [0xc1,0xb2,0xc0,0x15]
71 std %cq, [%o3+%l5]
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dfir.ll19 %l5 = load i32, i32* %p2, align 4
20 %conv6.us = sext i32 %l5 to i64
44 %l5 = load i32, i32* %p2, align 4
45 %conv6.us = sext i32 %l5 to i64
Dmve-vqdmulh.ll12 %l5 = sext <16 x i8> %s1 to <16 x i32>
13 %l6 = mul nsw <16 x i32> %l5, %l2
28 %l5 = sext <16 x i8> %s1 to <16 x i32>
29 %l6 = mul nsw <16 x i32> %l5, %l2
45 %l5 = sext <8 x i16> %s1 to <8 x i32>
46 %l6 = mul nsw <8 x i32> %l5, %l2
61 %l5 = sext <8 x i16> %s1 to <8 x i32>
62 %l6 = mul nsw <8 x i32> %l5, %l2
139 %l5 = sext <8 x i16> %s1 to <8 x i22>
140 %l6 = mul nsw <8 x i22> %l5, %l2
[all …]
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dframe-08.ll31 %l5 = load volatile i32, i32 *%ptr
44 %add5 = add i32 %l5, %add4
91 %l5 = load volatile i32, i32 *%ptr
96 %add5 = add i32 %l5, %add4
134 %l5 = load volatile i32, i32 *%ptr
147 %add5 = add i32 %l5, %add4
193 %l5 = load volatile i32, i32 *%ptr
198 %add5 = add i32 %l5, %add4
227 %l5 = load volatile i32, i32 *%ptr
232 %add5 = add i32 %l5, %add4
[all …]
Dframe-04.ll44 %l5 = load volatile fp128, fp128 *%ptr
52 %add5 = fadd fp128 %l5, %add4
100 %l5 = load volatile fp128, fp128 *%ptr
107 %add5 = fadd fp128 %l5, %add4
145 %l5 = load volatile fp128, fp128 *%ptr
150 %add5 = fadd fp128 %l5, %add4
177 %l5 = load volatile fp128, fp128 *%ptr
181 %add5 = fadd fp128 %l5, %add4
Dframe-05.ll39 %l5 = load volatile i32, i32 *%ptr
53 %add5 = add i32 %l5, %add4
107 %l5 = load volatile i32, i32 *%ptr
120 %add5 = add i32 %l5, %add4
170 %l5 = load volatile i32, i32 *%ptr
176 %add5 = add i32 %l5, %add4
206 %l5 = load volatile i32, i32 *%ptr
211 %add5 = add i32 %l5, %add4
Dframe-06.ll36 %l5 = load volatile i64, i64 *%ptr
50 %add5 = add i64 %l5, %add4
104 %l5 = load volatile i64, i64 *%ptr
117 %add5 = add i64 %l5, %add4
167 %l5 = load volatile i64, i64 *%ptr
173 %add5 = add i64 %l5, %add4
203 %l5 = load volatile i64, i64 *%ptr
208 %add5 = add i64 %l5, %add4
Dframe-18.ll23 %l5 = load volatile i32, i32 *%ptr
44 store volatile i32 %l5, i32 *%ptr
65 %l5 = load volatile i64, i64 *%ptr
86 store volatile i64 %l5, i64 *%ptr
Dframe-02.ll45 %l5 = load volatile float, float *%ptr
61 %add5 = fadd float %l5, %add4
127 %l5 = load volatile float, float *%ptr
142 %add5 = fadd float %l5, %add4
193 %l5 = load volatile float, float *%ptr
202 %add5 = fadd float %l5, %add4
237 %l5 = load volatile float, float *%ptr
245 %add5 = fadd float %l5, %add4
Dframe-03.ll47 %l5 = load volatile double, double *%ptr
63 %add5 = fadd double %l5, %add4
129 %l5 = load volatile double, double *%ptr
144 %add5 = fadd double %l5, %add4
195 %l5 = load volatile double, double *%ptr
204 %add5 = fadd double %l5, %add4
239 %l5 = load volatile double, double *%ptr
247 %add5 = fadd double %l5, %add4
/external/llvm/test/CodeGen/SystemZ/
Dframe-08.ll31 %l5 = load volatile i32 , i32 *%ptr
44 %add5 = add i32 %l5, %add4
91 %l5 = load volatile i32 , i32 *%ptr
96 %add5 = add i32 %l5, %add4
134 %l5 = load volatile i32 , i32 *%ptr
147 %add5 = add i32 %l5, %add4
193 %l5 = load volatile i32 , i32 *%ptr
198 %add5 = add i32 %l5, %add4
227 %l5 = load volatile i32 , i32 *%ptr
232 %add5 = add i32 %l5, %add4
[all …]
Dframe-04.ll44 %l5 = load volatile fp128 , fp128 *%ptr
52 %add5 = fadd fp128 %l5, %add4
100 %l5 = load volatile fp128 , fp128 *%ptr
107 %add5 = fadd fp128 %l5, %add4
145 %l5 = load volatile fp128 , fp128 *%ptr
150 %add5 = fadd fp128 %l5, %add4
177 %l5 = load volatile fp128 , fp128 *%ptr
181 %add5 = fadd fp128 %l5, %add4
Dframe-05.ll39 %l5 = load volatile i32 , i32 *%ptr
53 %add5 = add i32 %l5, %add4
107 %l5 = load volatile i32 , i32 *%ptr
120 %add5 = add i32 %l5, %add4
170 %l5 = load volatile i32 , i32 *%ptr
176 %add5 = add i32 %l5, %add4
206 %l5 = load volatile i32 , i32 *%ptr
211 %add5 = add i32 %l5, %add4
Dframe-06.ll36 %l5 = load volatile i64 , i64 *%ptr
50 %add5 = add i64 %l5, %add4
104 %l5 = load volatile i64 , i64 *%ptr
117 %add5 = add i64 %l5, %add4
167 %l5 = load volatile i64 , i64 *%ptr
173 %add5 = add i64 %l5, %add4
203 %l5 = load volatile i64 , i64 *%ptr
208 %add5 = add i64 %l5, %add4
Dframe-18.ll23 %l5 = load volatile i32 , i32 *%ptr
44 store volatile i32 %l5, i32 *%ptr
65 %l5 = load volatile i64 , i64 *%ptr
86 store volatile i64 %l5, i64 *%ptr
/external/rust/crates/nix/test/sys/
Dtest_sysinfo.rs7 let (l1, l5, l15) = info.load_average(); in sysinfo_works()
9 assert!(l5 >= 0.0); in sysinfo_works()
/external/llvm-project/llvm/test/Transforms/InterleavedAccess/AArch64/
Dbinopshuffles.ll26 %l5 = shufflevector <8 x float> %l4, <8 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
27 %l6 = fadd fast <4 x float> %l5, %l3
54 %l5 = shufflevector <12 x float> %l4, <12 x float> undef, <4 x i32> <i32 1, i32 4, i32 7, i32 10>
55 %l6 = fadd fast <4 x float> %l5, %l3
87 %l5 = fmul fast <16 x float> %wide.vec, %wide.vec
88 %l6 = shufflevector <16 x float> %l5, <16 x float> undef, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
118 %l5 = shufflevector <8 x float> %l4, <8 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
121 %l8 = fadd fast <4 x float> %l7, %l5
145 %l5 = shufflevector <8 x float> %l4, <8 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
149 %l8 = fadd fast <4 x float> %l6, %l5
/external/llvm/test/CodeGen/X86/
Dlarge-constants.ll30 %l5 = and i64 %o5, -281474976710652
31 %c5 = icmp ne i64 %l5, 0
35 ret i64 %l5

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