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/external/llvm-project/llvm/test/MC/Sparc/
Dsparc-mem-instructions.s4 ! CHECK: ldsb [%i0+%l6], %o2 ! encoding: [0xd4,0x4e,0x00,0x16]
5 ldsb [%i0 + %l6], %o2
10 ! CHECK: ldsba [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xce,0x10,0x76]
11 ldsba [%i0 + %l6] 131, %o2
13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
19 ! CHECK: ldsha [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xd6,0x10,0x76]
20 ldsha [%i0 + %l6] 131, %o2
22 ! CHECK: ldub [%i0+%l6], %o2 ! encoding: [0xd4,0x0e,0x00,0x16]
23 ldub [%i0 + %l6], %o2
[all …]
Dleon-instructions.s8 ! CHECK: casa [%i0] 10, %l6, %o2 ! encoding: [0xd5,0xe6,0x01,0x56]
9 casa [%i0] 10, %l6, %o2
11 ! CHECK: casa [%i0] 5, %l6, %o2 ! encoding: [0xd5,0xe6,0x00,0xb6]
12 casa [%i0] 5, %l6, %o2
14 ! CHECK: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
15 ! CHECK_NO_CASA: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
16 umac %i0, %l6, %o2
18 ! CHECK: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
19 ! CHECK_NO_CASA: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
20 smac %i0, %l6, %o2
Dsparcv9-atomic-instructions.s15 ! CHECK: cas [%i0], %l6, %o2 ! encoding: [0xd5,0xe6,0x10,0x16]
16 cas [%i0], %l6, %o2
18 ! CHECK: casx [%i0], %l6, %o2 ! encoding: [0xd5,0xf6,0x10,0x16]
19 casx [%i0], %l6, %o2
Dsparc-atomic-instructions.s7 ! CHECK: swap [%i0+%l6], %o2 ! encoding: [0xd4,0x7e,0x00,0x16]
8 swap [%i0+%l6], %o2
13 ! CHECK: swapa [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
14 swapa [%i0+%l6] 131, %o2
/external/llvm/test/MC/Sparc/
Dsparc-mem-instructions.s4 ! CHECK: ldsb [%i0+%l6], %o2 ! encoding: [0xd4,0x4e,0x00,0x16]
5 ldsb [%i0 + %l6], %o2
10 ! CHECK: ldsba [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xce,0x10,0x76]
11 ldsba [%i0 + %l6] 131, %o2
13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
19 ! CHECK: ldsha [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xd6,0x10,0x76]
20 ldsha [%i0 + %l6] 131, %o2
22 ! CHECK: ldub [%i0+%l6], %o2 ! encoding: [0xd4,0x0e,0x00,0x16]
23 ldub [%i0 + %l6], %o2
[all …]
Dleon-instructions.s8 ! CHECK: casa [%i0] 10, %l6, %o2 ! encoding: [0xd5,0xe6,0x01,0x56]
9 casa [%i0] 10, %l6, %o2
11 ! CHECK: casa [%i0] 5, %l6, %o2 ! encoding: [0xd5,0xe6,0x00,0xb6]
12 casa [%i0] 5, %l6, %o2
14 ! CHECK: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
15 ! CHECK_NO_CASA: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
16 umac %i0, %l6, %o2
18 ! CHECK: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
19 ! CHECK_NO_CASA: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
20 smac %i0, %l6, %o2
Dsparcv9-atomic-instructions.s6 ! CHECK: cas [%i0], %l6, %o2 ! encoding: [0xd5,0xe6,0x10,0x16]
7 cas [%i0], %l6, %o2
9 ! CHECK: casx [%i0], %l6, %o2 ! encoding: [0xd5,0xf6,0x10,0x16]
10 casx [%i0], %l6, %o2
Dsparc-atomic-instructions.s7 ! CHECK: swap [%i0+%l6], %o2 ! encoding: [0xd4,0x7e,0x00,0x16]
8 swap [%i0+%l6], %o2
13 ! CHECK: swapa [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
14 swapa [%i0+%l6] 131, %o2
/external/capstone/suite/MC/Sparc/
Dsparc-mem-instructions.s.cs2 0xd4,0x4e,0x00,0x16 = ldsb [%i0+%l6], %o2
5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
8 0xd4,0x0e,0x00,0x16 = ldub [%i0+%l6], %o2
11 0xd4,0x16,0x00,0x16 = lduh [%i0+%l6], %o2
14 0xd4,0x06,0x00,0x16 = ld [%i0+%l6], %o2
17 0xd4,0x2e,0x00,0x16 = stb %o2, [%i0+%l6]
20 0xd4,0x36,0x00,0x16 = sth %o2, [%i0+%l6]
23 0xd4,0x26,0x00,0x16 = st %o2, [%i0+%l6]
Dsparc-atomic-instructions.s.cs4 0xd4,0x7e,0x00,0x16 = swap [%i0+%l6], %o2
6 0xd5,0xe6,0x10,0x16 = cas [%i0], %l6, %o2
7 0xd5,0xf6,0x10,0x16 = casx [%i0], %l6, %o2
/external/llvm/test/MC/Disassembler/Sparc/
Dsparc-mem.txt3 # CHECK: ldsb [%i0+%l6], %o2
15 # CHECK: ldsh [%i0+%l6], %o2
27 # CHECK: ldub [%i0+%l6], %o2
39 # CHECK: lduh [%i0+%l6], %o2
51 # CHECK: ld [%i0+%l6], %o2
63 # CHECK: ld [%i0+%l6], %f2
75 # CHECK: ldd [%i0+%l6], %f2
87 # CHECK: ldq [%i0+%l6], %f4
99 # CHECK: ldx [%i0+%l6], %o2
111 # CHECK: ldsw [%i0+%l6], %o2
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/Sparc/
Dsparc-mem.txt3 # CHECK: ldsb [%i0+%l6], %o2
15 # CHECK: ldsh [%i0+%l6], %o2
27 # CHECK: ldub [%i0+%l6], %o2
39 # CHECK: lduh [%i0+%l6], %o2
51 # CHECK: ld [%i0+%l6], %o2
63 # CHECK: ld [%i0+%l6], %f2
75 # CHECK: ldd [%i0+%l6], %f2
87 # CHECK: ldq [%i0+%l6], %f4
99 # CHECK: ldx [%i0+%l6], %o2
111 # CHECK: ldsw [%i0+%l6], %o2
[all …]
/external/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
24 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
35 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
47 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
58 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
69 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
80 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
91 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
102 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
113 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
/external/llvm-project/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
24 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
35 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
47 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
58 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
69 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
80 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
91 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
102 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
113 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
Dumulo-128-legalisation-lowering.ll37 ; SPARC-NEXT: rd %y, %l6
39 ; SPARC-NEXT: add %l6, %i0, %l7
119 ; SPARC-NEXT: cmp %l7, %l6
121 ; SPARC-NEXT: mov %g3, %l6
123 ; SPARC-NEXT: mov %l0, %l6
129 ; SPARC-NEXT: mov %l6, %l2
148 ; SPARC-NEXT: mov %g3, %l6
150 ; SPARC-NEXT: mov %l0, %l6
155 ; SPARC-NEXT: or %l4, %l6, %i2
/external/clang/test/CodeGenObjC/
Dproperty-complex.m49 _Complex float l6 = (a0.p0 = a0.p0);
58 printf("l6: %.2f + %.2fi\n", __real l6, __imag l6);
/external/llvm-project/clang/test/CodeGenObjC/
Dproperty-complex.m49 _Complex float l6 = (a0.p0 = a0.p0);
58 printf("l6: %.2f + %.2fi\n", __real l6, __imag l6);
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dfir.ll22 %l6 = lshr i64 %mul.us, 31
23 %l7 = trunc i64 %l6 to i32
47 %l6 = lshr i64 %mul.us, 32
48 %shl74.us = shl nuw nsw i64 %l6, 1
Dmve-vqdmulh.ll13 %l6 = mul nsw <16 x i32> %l5, %l2
14 …%l7 = ashr <16 x i32> %l6, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, …
29 %l6 = mul nsw <16 x i32> %l5, %l2
30 …%l7 = ashr <16 x i32> %l6, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, …
46 %l6 = mul nsw <8 x i32> %l5, %l2
47 %l7 = ashr <8 x i32> %l6, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
62 %l6 = mul nsw <8 x i32> %l5, %l2
63 %l7 = ashr <8 x i32> %l6, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
140 %l6 = mul nsw <8 x i22> %l5, %l2
141 %l7 = ashr <8 x i22> %l6, <i22 15, i22 15, i22 15, i22 15, i22 15, i22 15, i22 15, i22 15>
[all …]
/external/llvm-project/llvm/test/Transforms/InterleavedAccess/AArch64/
Dbinopshuffles.ll27 %l6 = fadd fast <4 x float> %l5, %l3
28 ret <4 x float> %l6
55 %l6 = fadd fast <4 x float> %l5, %l3
58 %l9 = fadd fast <4 x float> %l6, %l8
88 %l6 = shufflevector <16 x float> %l5, <16 x float> undef, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
89 %l7 = fadd fast <4 x float> %l6, %l4
119 %l6 = fmul fast <8 x float> %wide.vec26, %wide.vec
120 %l7 = shufflevector <8 x float> %l6, <8 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
148 %l6 = fmul fast <4 x float> %s1, %s2
149 %l8 = fadd fast <4 x float> %l6, %l5
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dframe-18.ll24 %l6 = load volatile i32, i32 *%ptr
43 store volatile i32 %l6, i32 *%ptr
66 %l6 = load volatile i64, i64 *%ptr
85 store volatile i64 %l6, i64 *%ptr
Dframe-02.ll46 %l6 = load volatile float, float *%ptr
62 %add6 = fadd float %l6, %add5
128 %l6 = load volatile float, float *%ptr
143 %add6 = fadd float %l6, %add5
194 %l6 = load volatile float, float *%ptr
203 %add6 = fadd float %l6, %add5
238 %l6 = load volatile float, float *%ptr
246 %add6 = fadd float %l6, %add5
Dframe-03.ll48 %l6 = load volatile double, double *%ptr
64 %add6 = fadd double %l6, %add5
130 %l6 = load volatile double, double *%ptr
145 %add6 = fadd double %l6, %add5
196 %l6 = load volatile double, double *%ptr
205 %add6 = fadd double %l6, %add5
240 %l6 = load volatile double, double *%ptr
248 %add6 = fadd double %l6, %add5
/external/llvm/test/CodeGen/SystemZ/
Dframe-18.ll24 %l6 = load volatile i32 , i32 *%ptr
43 store volatile i32 %l6, i32 *%ptr
66 %l6 = load volatile i64 , i64 *%ptr
85 store volatile i64 %l6, i64 *%ptr
Dframe-03.ll48 %l6 = load volatile double , double *%ptr
64 %add6 = fadd double %l6, %add5
130 %l6 = load volatile double , double *%ptr
145 %add6 = fadd double %l6, %add5
196 %l6 = load volatile double , double *%ptr
205 %add6 = fadd double %l6, %add5
240 %l6 = load volatile double , double *%ptr
248 %add6 = fadd double %l6, %add5

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