/external/llvm-project/llvm/test/MC/AArch64/SVE/ |
D | ld1rsb.s | 10 ld1rsb { z0.h }, p0/z, [x0] label 16 ld1rsb { z0.s }, p0/z, [x0] label 22 ld1rsb { z0.d }, p0/z, [x0] label 28 ld1rsb { z31.h }, p7/z, [sp, #63] label 34 ld1rsb { z31.s }, p7/z, [sp, #63] label 40 ld1rsb { z31.d }, p7/z, [sp, #63] label
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D | ld1rsb-diagnostics.s | 6 ld1rsb z0.h, p1/z, [x0, #-1] label 11 ld1rsb z0.h, p1/z, [x0, #64] label 20 ld1rsb z0.b, p1/z, [x0] label 29 ld1rsb z0.h, p8/z, [x0] label 39 ld1rsb { z31.d }, p7/z, [sp, #63] label 45 ld1rsb { z31.d }, p7/z, [sp, #63] label
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12514 "\006ld1rqb\006ld1rqd\006ld1rqh\006ld1rqw\006ld1rsb\006ld1rsh\006ld1rsw\005" 15200 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Re… 15201 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Re… 15202 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Re… 15203 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1_… 15204 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1_… 15205 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1_… 15206 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Re… 15207 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Re… 15208 …{ 1924 /* ld1rsb */, AArch64::LD1RSB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Re… [all …]
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D | AArch64GenAsmWriter.inc | 22311 /* 3601 */ "ld1rsb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 22312 /* 3627 */ "ld1rsb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 22313 /* 3653 */ "ld1rsb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
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D | AArch64GenAsmWriter1.inc | 23032 /* 3593 */ "ld1rsb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0" 23033 /* 3619 */ "ld1rsb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0" 23034 /* 3645 */ "ld1rsb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 372 defm LD1RSB_D_IMM : sve_mem_ld_dup<0b11, 0b00, "ld1rsb", Z_d, ZPR64, uimm6s1>; 373 defm LD1RSB_S_IMM : sve_mem_ld_dup<0b11, 0b01, "ld1rsb", Z_s, ZPR32, uimm6s1>; 374 defm LD1RSB_H_IMM : sve_mem_ld_dup<0b11, 0b10, "ld1rsb", Z_h, ZPR16, uimm6s1>;
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 712 defm LD1RSB_D_IMM : sve_mem_ld_dup<0b11, 0b00, "ld1rsb", Z_d, ZPR64, uimm6s1>; 713 defm LD1RSB_S_IMM : sve_mem_ld_dup<0b11, 0b01, "ld1rsb", Z_s, ZPR32, uimm6s1>; 714 defm LD1RSB_H_IMM : sve_mem_ld_dup<0b11, 0b10, "ld1rsb", Z_h, ZPR16, uimm6s1>;
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/external/vixl/test/aarch64/ |
D | test-disasm-sve-aarch64.cc | 3472 COMPARE_PREFIX(ld1rsb(z16.VnH(), p1.Zeroing(), SVEMemOperand(x29, 0)), in TEST() 3474 COMPARE_PREFIX(ld1rsb(z8.VnS(), p6.Zeroing(), SVEMemOperand(sp, 33)), in TEST() 3476 COMPARE_PREFIX(ld1rsb(z25.VnD(), p2.Zeroing(), SVEMemOperand(x18, 63)), in TEST()
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 4588 void ld1rsb(const ZRegister& zt,
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D | assembler-sve-aarch64.cc | 4179 void Assembler::ld1rsb(const ZRegister& zt, in ld1rsb() function in vixl::aarch64::Assembler
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D | macro-assembler-aarch64.h | 4872 &MacroAssembler::ld1rsb, in Ld1rsb()
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