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Searched refs:ld2b (Results 1 – 25 of 34) sorted by relevance

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/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dld2b-diagnostics.s7 ld2b {z12.b, z13.b}, p4/z, [x12, #-18, MUL VL] label
12 ld2b {z7.b, z8.b}, p3/z, [x1, #16, MUL VL] label
21 ld2b {z12.b, z13.b}, p4/z, [x12, #-7, MUL VL] label
26 ld2b {z7.b, z8.b}, p3/z, [x1, #5, MUL VL] label
35 ld2b { z0.b, z1.b }, p0/z, [x0, xzr] label
40 ld2b { z0.b, z1.b }, p0/z, [x0, x0, lsl #1] label
45 ld2b { z0.b, z1.b }, p0/z, [x0, w0] label
50 ld2b { z0.b, z1.b }, p0/z, [x0, w0, uxtw] label
59 ld2b {z2.b, z3.b}, p8/z, [x15, #10, MUL VL] label
68 ld2b { }, p0/z, [x0] label
[all …]
Dld2b.s10 ld2b { z0.b, z1.b }, p0/z, [x0, x0] label
16 ld2b { z5.b, z6.b }, p3/z, [x17, x16] label
22 ld2b { z0.b, z1.b }, p0/z, [x0] label
28 ld2b { z23.b, z24.b }, p3/z, [x13, #-16, mul vl] label
34 ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl] label
/external/llvm-project/llvm/test/MC/VE/
DLD.s34 # CHECK-INST: ld2b.sx %s11, 20(%s10, %s11)
36 ld2b.sx %s11, 20(%s10, %s11)
38 # CHECK-INST: ld2b.zx %s11, 20(%s10, %s11)
40 ld2b.zx %s11, 20(%s10, %s11)
/external/llvm-project/llvm/test/CodeGen/VE/Scalar/
Dva_callee.ll6 ; CHECK: ld2b.sx %s18, 192(, %s9)
9 ; CHECK: ld2b.zx %s21, 216(, %s9)
47 ; CHECK: ld2b.sx %s18,
50 ; CHECK: ld2b.zx %s21,
94 ; CHECK: ld2b.sx %s18,
97 ; CHECK: ld2b.zx %s21,
Dsext_zext_load.ll151 ; CHECK-NEXT: ld2b.sx %s0, 14(, %s11)
163 ; CHECK-NEXT: ld2b.sx %s0, 14(, %s11)
175 ; CHECK-NEXT: ld2b.zx %s0, 14(, %s11)
186 ; CHECK-NEXT: ld2b.sx %s0, 14(, %s11)
198 ; CHECK-NEXT: ld2b.zx %s0, 14(, %s11)
210 ; CHECK-NEXT: ld2b.zx %s0, 14(, %s11)
222 ; CHECK-NEXT: ld2b.zx %s0, 14(, %s11)
233 ; CHECK-NEXT: ld2b.zx %s0, 14(, %s11)
Dfp_extload_truncstore.ll12 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
26 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
41 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
55 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
Dload.ll94 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
104 ; CHECK-NEXT: ld2b.sx %s0, (, %s0)
115 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
232 ; CHECK-NEXT: ld2b.zx %s0, (, %s11)
Dva_arg.ll18 ; CHECK: ld2b.sx %s19, 192(, %s9)
21 ; CHECK: ld2b.zx %s24, 216(, %s9)
Dload-align1.ll62 ; CHECK-NEXT: ld2b.zx %s0, 14(, %s11)
141 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
Dload-align8.ll62 ; CHECK-NEXT: ld2b.zx %s0, 8(, %s11)
141 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
Dload-align2.ll62 ; CHECK-NEXT: ld2b.zx %s0, 14(, %s11)
141 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
Dload-align4.ll62 ; CHECK-NEXT: ld2b.zx %s0, 12(, %s11)
141 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
Datomic_load.ll104 ; CHECK-NEXT: ld2b.sx %s0, (, %s0)
115 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
259 ; CHECK-NEXT: ld2b.sx %s0, (, %s0)
271 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
420 ; CHECK-NEXT: ld2b.sx %s0, (, %s0)
432 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
Dload_off.ll33 ; CHECK-NEXT: ld2b.sx %s0, 4(, %s0)
104 ; CHECK-NEXT: ld2b.zx %s0, 4(, %s0)
Dload_gv.ll99 ; CHECK-NEXT: ld2b.zx %s0, (, %s0)
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-ldN-reg+imm-addr-mode.ll13 ; ld2b
16 ; CHECK: ld2b { z0.b, z1.b }, p0/z, [x0, #2, mul vl]
26 ; CHECK: ld2b { z0.b, z1.b }, p0/z, [x0, #-16, mul vl]
36 ; CHECK: ld2b { z0.b, z1.b }, p0/z, [x0, #14, mul vl]
47 ; CHECK-NEXT: ld2b { z0.b, z1.b }, p0/z, [x0, x[[OFFSET]]]
58 ; CHECK-NEXT: ld2b { z0.b, z1.b }, p0/z, [x0, x[[OFFSET]]]
69 ; CHECK-NEXT: ld2b { z0.b, z1.b }, p0/z, [x0, x[[OFFSET]]]
Dsve-intrinsics-ldN-reg+reg-addr-mode.ll7 ; ld2b
10 ; CHECK: ld2b { z0.b, z1.b }, p0/z, [x0, x1]
Dsve-intrinsics-loads.ll291 ; CHECK: ld2b { z0.b, z1.b }, p0/z, [x0]
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc3929 COMPARE_PREFIX(ld2b(z31.VnB(), z0.VnB(), p6.Zeroing(), SVEMemOperand(x19)), in TEST()
3931 COMPARE_PREFIX(ld2b(z31.VnB(), in TEST()
3936 COMPARE_PREFIX(ld2b(z15.VnB(), in TEST()
4166 COMPARE_PREFIX(ld2b(z25.VnB(), in TEST()
4171 COMPARE_PREFIX(ld2b(z25.VnB(), in TEST()
4176 COMPARE_PREFIX(ld2b(z31.VnB(), in TEST()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td442 defm LD2B_IMM : sve_mem_eld_si<0b00, 0b01, ZZ_b, "ld2b", simm4s2>;
456 def LD2B : sve_mem_eld_ss<0b00, 0b01, ZZ_b, "ld2b", GPR64NoXZRshifted8>;
/external/llvm-project/llvm/lib/Target/VE/
DVEInstrInfo.td1007 defm LD2BSX : LOADm<"ld2b.sx", 0x04, I32, i32, sextloadi16>;
1009 defm LD2BZX : LOADm<"ld2b.zx", 0x04, I32, i32, zextloadi16>;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td782 defm LD2B_IMM : sve_mem_eld_si<0b00, 0b01, ZZ_b, "ld2b", simm4s2>;
796 def LD2B : sve_mem_eld_ss<0b00, 0b01, ZZ_b, "ld2b", GPR64NoXZRshifted8>;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12515 "ld1rw\005ld1sb\005ld1sh\005ld1sw\004ld1w\003ld2\004ld2b\004ld2d\004ld2h"
15436 …{ 1978 /* ld2b */, AArch64::LD2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5…
15437 …{ 1978 /* ld2b */, AArch64::LD2B, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5__GP…
15438 …{ 1978 /* ld2b */, AArch64::LD2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5…
22809 …{ 1978 /* ld2b */, AArch64::LD2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5…
22810 …{ 1978 /* ld2b */, AArch64::LD2B, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5__GP…
22811 …{ 1978 /* ld2b */, AArch64::LD2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5…
32755 { 1978 /* ld2b */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
32756 { 1978 /* ld2b */, 1 /* 0 */, MCK_SVEVectorList28, AMFBS_HasSVE },
32757 { 1978 /* ld2b */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
[all …]
/external/vixl/src/aarch64/
Dassembler-aarch64.h4620 void ld2b(const ZRegister& zt1,
Dmacro-assembler-aarch64.h4910 ld2b(zt1, zt2, pg, addr); in Ld2b()

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