| /external/llvm/test/MC/ARM/ |
| D | load-store-acquire-release-v8-thumb.s | 3 ldaexb r3, [r4]
8 @ CHECK: ldaexb r3, [r4] @ encoding: [0xd4,0xe8,0xcf,0x3f]
|
| D | load-store-acquire-release-v8.s | 3 ldaexb r3, [r4]
8 @ CHECK: ldaexb r3, [r4] @ encoding: [0x9f,0x3e,0xd4,0xe1]
|
| D | thumbv8m.s | 121 ldaexb r1, [r2] label
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | load-store-acquire-release-v8-thumb.s | 3 ldaexb r3, [r4]
8 @ CHECK: ldaexb r3, [r4] @ encoding: [0xd4,0xe8,0xcf,0x3f]
|
| D | load-store-acquire-release-v8.s | 3 ldaexb r3, [r4]
8 @ CHECK: ldaexb r3, [r4] @ encoding: [0x9f,0x3e,0xd4,0xe1]
|
| D | thumbv8m.s | 121 ldaexb r1, [r2] label
|
| /external/capstone/suite/MC/ARM/ |
| D | load-store-acquire-release-v8.s.cs | 2 0x9f,0x3e,0xd4,0xe1 = ldaexb r3, [r4]
|
| D | load-store-acquire-release-v8-thumb.s.cs | 2 0xd4,0xe8,0xcf,0x3f = ldaexb r3, [r4]
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | load-store-acquire-release-v8.txt | 6 # CHECK: ldaexb r0, [r8] @ encoding: [0x9f,0x0e,0xd8,0xe1]
|
| D | load-store-acquire-release-v8-thumb.txt | 7 # CHECK: ldaexb r3, [r4] @ encoding: [0xd4,0xe8,0xcf,0x3f]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | load-store-acquire-release-v8-thumb.txt | 7 # CHECK: ldaexb r3, [r4] @ encoding: [0xd4,0xe8,0xcf,0x3f]
|
| D | load-store-acquire-release-v8.txt | 6 # CHECK: ldaexb r0, [r8] @ encoding: [0x9f,0x0e,0xd8,0xe1]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | ldaex-stlex.ll | 35 ; CHECK: ldaexb r0, [r0]
|
| D | atomic-ops-v8.ll | 20 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
308 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
404 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
589 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
702 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
928 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
1043 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | ldaex-stlex.ll | 35 ; CHECK: ldaexb r0, [r0]
|
| D | atomic-ops-m33.ll | 12 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
|
| D | atomic-ops-v8.ll | 20 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
308 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
404 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
589 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
702 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
928 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
1043 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2284 void ldaexb(Condition cond, Register rt, const MemOperand& operand);
2285 void ldaexb(Register rt, const MemOperand& operand) { in ldaexb() function
2286 ldaexb(al, rt, operand); in ldaexb()
|
| D | disasm-aarch32.h | 777 void ldaexb(Condition cond, Register rt, const MemOperand& operand);
|
| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 241 { /* ARM_LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */
5497 { /* ARM_t2LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 241 { /* ARM_LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */
5497 { /* ARM_t2LDAEXB, ARM_INS_LDAEXB: ldaexb${p} $rt, $addr */
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3313 "ldaexb", "\t$Rt, $addr", "",
|
| D | ARMInstrInfo.td | 4699 NoItinerary, "ldaexb", "\t$Rt, $addr",
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3536 "ldaexb", "\t$Rt, $addr", "",
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3605 "ldaexb", "\t$Rt, $addr", "",
|