Home
last modified time | relevance | path

Searched refs:ldff1b (Results 1 – 25 of 34) sorted by relevance

12

/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dldff1b-diagnostics.s6 ldff1b z27.b, p8/z, [x0] label
11 ldff1b z9.h, p8/z, [x0] label
16 ldff1b z12.s, p8/z, [x0] label
21 ldff1b z4.d, p8/z, [x0] label
29 ldff1b z0.b, p0/z, [x0, sp] label
34 ldff1b z0.b, p0/z, [x0, x0, lsl #1] label
39 ldff1b z0.b, p0/z, [x0, w0] label
44 ldff1b z0.b, p0/z, [x0, w0, uxtw] label
52 ldff1b z0.d, p0/z, [x0, z0.b] label
57 ldff1b z0.d, p0/z, [x0, z0.h] label
[all …]
Dldff1b.s10 ldff1b { z31.b }, p7/z, [sp] label
16 ldff1b { z31.h }, p7/z, [sp] label
22 ldff1b { z31.s }, p7/z, [sp] label
28 ldff1b { z31.d }, p7/z, [sp] label
34 ldff1b { z31.b }, p7/z, [sp, xzr] label
40 ldff1b { z31.h }, p7/z, [sp, xzr] label
46 ldff1b { z31.s }, p7/z, [sp, xzr] label
52 ldff1b { z31.d }, p7/z, [sp, xzr] label
58 ldff1b { z0.h }, p0/z, [x0, x0] label
64 ldff1b { z0.s }, p0/z, [x0, x0] label
[all …]
/external/arm-optimized-routines/string/aarch64/
Dstrnlen-sve.S26 0: ldff1b z0.b, p0/z, [x0, x2]
42 ldff1b z0.b, p0/z, [x0, x2]
Dstrcmp-sve.S26 0: ldff1b z0.b, p1/z, [x0, x2]
27 ldff1b z1.b, p1/z, [x1, x2]
Dstrncmp-sve.S27 ldff1b z0.b, p0/z, [x0, x3]
28 ldff1b z1.b, p0/z, [x1, x3]
Dstrlen-sve.S25 0: ldff1b z0.b, p2/z, [x0, x1]
Dmemchr-sve.S30 ldff1b z0.b, p1/z, [x0, x3]
Dstrcpy-sve.S33 0: ldff1b z0.b, p2/z, [x1, x2]
Dstrchr-sve.S32 0: ldff1b z0.b, p1/z, [x0, xzr]
Dstrrchr-sve.S27 0: ldff1b z0.b, p1/z, [x0, xzr]
/external/llvm-project/libc/AOR_v20.02/string/aarch64/
Dstrnlen-sve.S29 0: ldff1b z0.b, p0/z, [x0, x2]
45 ldff1b z0.b, p0/z, [x0, x2]
Dstrcmp-sve.S29 0: ldff1b z0.b, p1/z, [x0, x2]
30 ldff1b z1.b, p1/z, [x1, x2]
Dstrncmp-sve.S29 ldff1b z0.b, p0/z, [x0, x3]
30 ldff1b z1.b, p0/z, [x1, x3]
Dstrlen-sve.S29 0: ldff1b z0.b, p2/z, [x0, x1]
Dmemchr-sve.S33 ldff1b z0.b, p1/z, [x0, x3]
Dstrcpy-sve.S36 0: ldff1b z0.b, p2/z, [x1, x2]
Dstrchr-sve.S36 0: ldff1b z0.b, p1/z, [x0, xzr]
Dstrrchr-sve.S31 0: ldff1b z0.b, p1/z, [x0, xzr]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-loads-ff.ll11 define <vscale x 16 x i8> @ldff1b(<vscale x 16 x i1> %pg, i8* %a) {
12 ; CHECK-LABEL: ldff1b:
13 ; CHECK: ldff1b { z0.b }, p0/z, [x0]
21 ; CHECK: ldff1b { z0.b }, p0/z, [x0, x1]
30 ; CHECK: ldff1b { z0.h }, p0/z, [x0]
39 ; CHECK: ldff1b { z0.h }, p0/z, [x0, x1]
49 ; CHECK: ldff1b { z0.s }, p0/z, [x0]
58 ; CHECK: ldff1b { z0.s }, p0/z, [x0, x1]
68 ; CHECK: ldff1b { z0.d }, p0/z, [x0]
77 ; CHECK: ldff1b { z0.d }, p0/z, [x0, x1]
Dsve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll9 ; e.g. ldff1b { z0.d }, p0/z, [x0, z0.d]
15 ; CHECK: ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
26 ; CHECK: ldff1b { z0.d }, p0/z, [x0, z0.d]
112 ; e.g. ldff1b { z0.d }, p0/z, [x0, z0.d]
Dsve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll15 ; CHECK: ldff1b { z0.s }, p0/z, [z0.s, #16]
26 ; CHECK: ldff1b { z0.d }, p0/z, [z0.d, #16]
176 ; e.g. ldff1b { z0.d }, p0/z, [x0, z0.d]
183 ; CHECK-NEXT: ldff1b { z0.s }, p0/z, [x8, z0.s, uxtw]
195 ; CHECK-NEXT: ldff1b { z0.d }, p0/z, [x8, z0.d]
Dsve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll16 ; CHECK: ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
27 ; CHECK: ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
38 ; CHECK: ldff1b { z0.d }, p0/z, [x0, z0.d, uxtw]
49 ; CHECK: ldff1b { z0.d }, p0/z, [x0, z0.d, sxtw]
Dsve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll14 ; CHECK: ldff1b { z0.d }, p0/z, [x0, z0.d]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12525 "b\007ldeorlh\006ldff1b\006ldff1d\006ldff1h\007ldff1sb\007ldff1sh\007ldf"
15828 …{ 2450 /* ldff1b */, AArch64::LDFF1B_H_REAL, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__R…
15829 …{ 2450 /* ldff1b */, AArch64::LDFF1B_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__R…
15830 …{ 2450 /* ldff1b */, AArch64::GLDFF1B_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1…
15831 …{ 2450 /* ldff1b */, AArch64::LDFF1B_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__R…
15832 …{ 2450 /* ldff1b */, AArch64::GLDFF1B_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1…
15833 …{ 2450 /* ldff1b */, AArch64::LDFF1B_REAL, Convert__SVEVectorBReg1_0__SVEPredicate3bAnyReg1_1__Reg…
15834 …{ 2450 /* ldff1b */, AArch64::LDFF1B_REAL, Convert__SVEVectorList181_0__SVEPredicate3bAnyReg1_1__R…
15835 …{ 2450 /* ldff1b */, AArch64::LDFF1B_H_REAL, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1…
15836 …{ 2450 /* ldff1b */, AArch64::LDFF1B_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1…
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td424 defm LDFF1B : sve_mem_cldff_ss<0b0000, "ldff1b", Z_b, ZPR8, GPR64shifted8>;
425 defm LDFF1B_H : sve_mem_cldff_ss<0b0001, "ldff1b", Z_h, ZPR16, GPR64shifted8>;
426 defm LDFF1B_S : sve_mem_cldff_ss<0b0010, "ldff1b", Z_s, ZPR32, GPR64shifted8>;
427 defm LDFF1B_D : sve_mem_cldff_ss<0b0011, "ldff1b", Z_d, ZPR64, GPR64shifted8>;
474 …defm GLDFF1B_S : sve_mem_32b_gld_vs_32_unscaled<0b0011, "ldff1b", null_frag, nul…
496 …defm GLDFF1B_S : sve_mem_32b_gld_vi_32_ptrs<0b0011, "ldff1b", imm0_31, null_frag, …
509 …defm GLDFF1B_D : sve_mem_64b_gld_vi_64_ptrs<0b0011, "ldff1b", imm0_31, null_frag, …
526 defm GLDFF1B_D : sve_mem_64b_gld_vs2_64_unscaled<0b0011, "ldff1b", null_frag, nxv2i8>;
556 …defm GLDFF1B_D : sve_mem_64b_gld_vs_32_unscaled<0b0011, "ldff1b", null_frag, nul…

12