| /external/llvm/test/CodeGen/ARM/ |
| D | atomic-cmp.ll | 7 ; ARM: ldrexb
13 ; T2: ldrexb
|
| D | atomic-cmpxchg.ll | 40 ; CHECK-ARMV6-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
68 ; CHECK-ARMV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
94 ; CHECK-THUMBV7-NEXT: ldrexb [[LD:r[0-9]+]], [r0]
|
| D | cmpxchg-idioms.ll | 44 ; CHECK: ldrexb [[LOADED:r[0-9]+]], [r0]
54 ; CHECK: ldrexb [[LOADED]], [r0]
|
| D | cmpxchg-O0.ll | 13 ; CHECK: ldrexb [[OLD:r[0-9]+]], [r0]
|
| D | ldstrex.ll | 37 ; CHECK: ldrexb r0, [r0]
|
| D | atomic-ops-v8.ll | 116 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
212 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
500 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
815 ; CHECK: ldrexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | atomic-cmp.ll | 7 ; ARM: ldrexb
12 ; T2: ldrexb
|
| D | atomic-cmpxchg.ll | 41 ; CHECK-ARMV6-NEXT: ldrexb r3, [r0]
66 ; CHECK-ARMV7-NEXT: ldrexb r3, [r0]
82 ; CHECK-THUMBV7-NEXT: ldrexb r3, [r0]
|
| D | cmpxchg-idioms.ll | 44 ; CHECK: ldrexb [[LOADED:r[0-9]+]], [r0]
54 ; CHECK: ldrexb [[LOADED]], [r0]
|
| D | cmpxchg-O0.ll | 15 ; CHECK: ldrexb [[OLD:[lr0-9]+]], {{\[}}[[ADDR]]{{\]}}
|
| D | ldstrex.ll | 37 ; CHECK: ldrexb r0, [r0]
|
| D | atomic-ops-v8.ll | 116 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
212 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
500 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
815 ; CHECK: ldrexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
|
| /external/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 67 ldrexb r1, [r2] label
|
| D | basic-arm-instructions.s | 1193 ldrexb r3, [r4]
1198 @ CHECK: ldrexb r3, [r4] @ encoding: [0x9f,0x3f,0xd4,0xe1]
|
| D | basic-thumb2-instructions.s | 1056 ldrexb r5, [r7]
1063 @ CHECK: ldrexb r5, [r7] @ encoding: [0xd7,0xe8,0x4f,0x5f]
|
| /external/llvm-project/llvm/test/MC/ARM/ |
| D | thumbv8m.s | 67 ldrexb r1, [r2] label
|
| D | basic-arm-instructions.s | 1195 ldrexb r3, [r4]
1200 @ CHECK: ldrexb r3, [r4] @ encoding: [0x9f,0x3f,0xd4,0xe1]
|
| D | basic-thumb2-instructions.s | 1189 ldrexb r5, [r7]
1196 @ CHECK: ldrexb r5, [r7] @ encoding: [0xd7,0xe8,0x4f,0x5f]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 118 ldrexb r0, [r1] label
551 # CHECK-NEXT: 1 3 0.50 * * U ldrexb r0, [r1]
991 … - - 0.50 0.50 - - - - - - - - ldrexb r0, [r1]
|
| D | m4-int.s | 122 ldrexb r0, [r1] label
570 # CHECK-NEXT: 1 2 1.00 * * U ldrexb r0, [r1]
1008 # CHECK-NEXT: 1.00 ldrexb r0, [r1]
|
| D | cortex-a57-basic-instructions.s | 268 ldrexb r3, [r4]
1138 # CHECK-NEXT: 0 0 0.00 * * U ldrexb r3, [r4]
2015 # CHECK-NEXT: - - - - - - - - ldrexb r3, [r4]
|
| D | cortex-a57-thumb.s | 260 ldrexb r5, [r7]
1168 # CHECK-NEXT: 0 0 0.00 * * U ldrexb r5, [r7]
2082 # CHECK-NEXT: - - - - - - - - ldrexb r5, [r7]
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 333 0xd7,0xe8,0x4f,0x5f = ldrexb r5, [r7]
|
| D | basic-arm-instructions.s.cs | 328 0x9f,0x3f,0xd4,0xe1 = ldrexb r3, [r4]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2465 void ldrexb(Condition cond, Register rt, const MemOperand& operand);
2466 void ldrexb(Register rt, const MemOperand& operand) { in ldrexb() function
2467 ldrexb(al, rt, operand); in ldrexb()
|