/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 109 ldur w2, [x3] 110 ldur w2, [sp, #24] 111 ldur x2, [x3] 112 ldur x2, [sp, #24] 113 ldur b5, [sp, #1] 114 ldur h6, [sp, #2] 115 ldur s7, [sp, #4] 116 ldur d8, [sp, #8] define 117 ldur q9, [sp, #16] 124 ; CHECK: ldur w2, [x3] ; encoding: [0x62,0x00,0x40,0xb8] [all …]
|
/external/llvm-project/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 109 ldur w2, [x3] 110 ldur w2, [sp, #24] 111 ldur x2, [x3] 112 ldur x2, [sp, #24] 113 ldur b5, [sp, #1] 114 ldur h6, [sp, #2] 115 ldur s7, [sp, #4] 116 ldur d8, [sp, #8] define 117 ldur q9, [sp, #16] 124 ; CHECK: ldur w2, [x3] ; encoding: [0x62,0x00,0x40,0xb8] [all …]
|
/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | bcmp-inline-small.ll | 17 ; CHECKN-NEXT: ldur x 18 ; CHECKN-NEXT: ldur x 32 ; CHECKN-NEXT: ldur x 33 ; CHECKN-NEXT: ldur x 50 ; CHECKN-NEXT: ldur x 51 ; CHECKN-NEXT: ldur x
|
D | arm64-ldur.ll | 5 ; CHECK: ldur x0, [x0, #-8] 13 ; CHECK: ldur w0, [x0, #-4] 38 ; CHECK: ldur w0, [x0, #-12]
|
D | ldst-unscaledimm.ll | 153 ; CHECK: ldur {{w[0-9]+}}, [{{x[0-9]+}}, #1] 162 ; CHECK: ldur {{w[0-9]+}}, [{{x[0-9]+}}, #-256] 183 ; CHECK: ldur {{x[0-9]+}}, [{{x[0-9]+}}, #255] 197 ; CHECK: ldur {{s[0-9]+}}, [{{x[0-9]+}}, #-5] 198 ; CHECK-NOFP-NOT: ldur {{s[0-9]+}}, 215 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #4] 216 ; CHECK-NOFP-NOT: ldur {{d[0-9]+}},
|
D | stack-protector-target.ll | 26 ; FUCHSIA-AARCH64-COMMON: ldur [[B:.*]], {{\[}}[[A]], #-16] 28 ; FUCHSIA-AARCH64-COMMON: ldur [[C:.*]], {{\[}}[[A]], #-16]
|
D | arm64-vector-ldst.ll | 271 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 281 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 291 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 301 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 311 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 321 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 331 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 341 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 351 ; CHECK: ldur [[DESTREG:d[0-9]+]], {{\[}}[[BASEREG:x[0-9]+]], #3] 365 ; CHECK: ldur [[DESTREG:d[0-9]+]], {{\[}}[[BASEREG:x[0-9]+]], #3] [all …]
|
D | arm64-scvt.ll | 290 ; CHECK: ldur b[[REGNUM:[0-9]+]], [x0, #-1] 304 ; CHECK: ldur h[[REGNUM:[0-9]+]], [x0, #1] 318 ; CHECK: ldur s[[REGNUM:[0-9]+]], [x0, #1] 333 ; CHECK: ldur x[[REGNUM:[0-9]+]], [x0, #1] 350 ; CHECK: ldur b[[REGNUM:[0-9]+]], [x0, #-1] 364 ; CHECK: ldur h[[REGNUM:[0-9]+]], [x0, #1] 378 ; CHECK: ldur s[[REGNUM:[0-9]+]], [x0, #1] 392 ; CHECK: ldur d[[REGNUM:[0-9]+]], [x0, #1] 651 ; CHECK: ldur b[[REGNUM:[0-9]+]], [x0, #-1] 671 ; CHECK: ldur h[[REGNUM:[0-9]+]], [x0, #1] [all …]
|
D | arm64-memcpy-inline.ll | 19 ; CHECK-DAG: ldur [[REG0:w[0-9]+]], [x[[BASEREG:[0-9]+]], #7] 31 ; CHECK: ldur [[DEST:q[0-9]+]], [x[[BASEREG:[0-9]+]], #15] 88 ; CHECK-DAG: ldur [[REG9:x[0-9]+]], [x{{[0-9]+}}, #6]
|
D | fast-isel-int-ext3.ll | 54 ; CHECK: ldur w[[REG:[0-9]+]], [x0, #-8] 109 ; CHECK: ldur [[REG:w[0-9]+]], [x0, #-8]
|
D | big-callframe.ll | 7 ; CHECK: ldur {{.*}}, [x29, #{{.*}}] // 8-byte Folded Reload
|
D | arm64-ldp.ll | 209 ; CHECK-NOT: ldur 223 ; CHECK-NOT: ldur 239 ; CHECK-NOT: ldur 256 ; CHECK-NOT: ldur 306 ; CHECK: ldur 307 ; CHECK-NEXT: ldur
|
/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/ |
D | float-load.s | 9 ldur d0, [sp, #2] define 10 ldur q0, [sp, #16] label 82 # M3-NEXT: 1 5 0.50 * ldur d0, [sp, #2] 83 # M3-NEXT: 1 5 0.50 * ldur q0, [sp, #16] 107 # M4-NEXT: 1 5 0.50 * ldur d0, [sp, #2] 108 # M4-NEXT: 1 5 0.50 * ldur q0, [sp, #16] 132 # M5-NEXT: 1 6 0.50 * ldur d0, [sp, #2] 133 # M5-NEXT: 1 6 0.50 * ldur q0, [sp, #16]
|
D | load.s | 7 ldur x0, [sp, #8] label 48 # ALL-NEXT: 1 4 0.50 * ldur x0, [sp, #8]
|
/external/llvm/test/CodeGen/AArch64/ |
D | arm64-ldur.ll | 5 ; CHECK: ldur x0, [x0, #-8] 13 ; CHECK: ldur w0, [x0, #-4] 38 ; CHECK: ldur w0, [x0, #-12]
|
D | ldst-unscaledimm.ll | 153 ; CHECK: ldur {{w[0-9]+}}, [{{x[0-9]+}}, #1] 162 ; CHECK: ldur {{w[0-9]+}}, [{{x[0-9]+}}, #-256] 183 ; CHECK: ldur {{x[0-9]+}}, [{{x[0-9]+}}, #255] 197 ; CHECK: ldur {{s[0-9]+}}, [{{x[0-9]+}}, #-5] 198 ; CHECK-NOFP-NOT: ldur {{s[0-9]+}}, 215 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #4] 216 ; CHECK-NOFP-NOT: ldur {{d[0-9]+}},
|
D | arm64-vector-ldst.ll | 272 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 280 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 288 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 296 ; CHECK: ldur {{d[0-9]+}}, [{{x[0-9]+}}, #3] 304 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 312 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 320 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 328 ; CHECK: ldur {{q[0-9]+}}, [{{x[0-9]+}}, #3] 336 ; CHECK: ldur [[DESTREG:d[0-9]+]], {{\[}}[[BASEREG:x[0-9]+]], #3] 346 ; CHECK: ldur [[DESTREG:d[0-9]+]], {{\[}}[[BASEREG:x[0-9]+]], #3] [all …]
|
D | arm64-scvt.ll | 290 ; CHECK: ldur b[[REGNUM:[0-9]+]], [x0, #-1] 304 ; CHECK: ldur h[[REGNUM:[0-9]+]], [x0, #1] 318 ; CHECK: ldur s[[REGNUM:[0-9]+]], [x0, #1] 333 ; CHECK: ldur x[[REGNUM:[0-9]+]], [x0, #1] 350 ; CHECK: ldur b[[REGNUM:[0-9]+]], [x0, #-1] 364 ; CHECK: ldur h[[REGNUM:[0-9]+]], [x0, #1] 378 ; CHECK: ldur s[[REGNUM:[0-9]+]], [x0, #1] 392 ; CHECK: ldur d[[REGNUM:[0-9]+]], [x0, #1] 651 ; CHECK: ldur b[[REGNUM:[0-9]+]], [x0, #-1] 671 ; CHECK: ldur h[[REGNUM:[0-9]+]], [x0, #1] [all …]
|
D | arm64-ldp.ll | 186 ; CHECK-NOT: ldur 200 ; CHECK-NOT: ldur 216 ; CHECK-NOT: ldur 233 ; CHECK-NOT: ldur 283 ; CHECK: ldur 284 ; CHECK-NEXT: ldur
|
D | fast-isel-int-ext3.ll | 54 ; CHECK: ldur w[[REG:[0-9]+]], [x0, #-8] 109 ; CHECK: ldur [[REG:w[0-9]+]], [x0, #-8]
|
D | arm64-fast-isel.ll | 49 ; CHECK: ldur w0, [x0, #-4] 59 ; CHECK: ldur w0, [x0, #-256]
|
/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 122 # CHECK: ldur w2, [x3] 123 # CHECK: ldur w2, [sp, #24] 124 # CHECK: ldur x2, [x3] 125 # CHECK: ldur x2, [sp, #24] 126 # CHECK: ldur b5, [sp, #1] 127 # CHECK: ldur h6, [sp, #2] 128 # CHECK: ldur s7, [sp, #4] 129 # CHECK: ldur d8, [sp, #8] 130 # CHECK: ldur q9, [sp, #16]
|
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 122 # CHECK: ldur w2, [x3] 123 # CHECK: ldur w2, [sp, #24] 124 # CHECK: ldur x2, [x3] 125 # CHECK: ldur x2, [sp, #24] 126 # CHECK: ldur b5, [sp, #1] 127 # CHECK: ldur h6, [sp, #2] 128 # CHECK: ldur s7, [sp, #4] 129 # CHECK: ldur d8, [sp, #8] 130 # CHECK: ldur q9, [sp, #16]
|
/external/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ |
D | aarch64_generated_funcs.ll.nogenerated.expected | 19 ; CHECK-NEXT: ldur w8, [x29, #-8] 27 ; CHECK-NEXT: ldur w8, [x29, #-8]
|
D | aarch64_generated_funcs.ll.generated.expected | 78 ; CHECK-NEXT: ldur w8, [x29, #-8] 86 ; CHECK-NEXT: ldur w8, [x29, #-8]
|