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/external/llvm-project/llvm/test/MC/Mips/eva/
Dvalid_R6.s19lhue $s2,-256($v1) # CHECK: lhue $18, -256($3) # encoding: [0x7c,0x72,0x80,0x29]
20lhue $s2,255($v1) # CHECK: lhue $18, 255($3) # encoding: [0x7c,0x72,0x7f,0xa9]
21lhue $s6,-168($v0) # CHECK: lhue $22, -168($2) # encoding: [0x7c,0x56,0xac,0x29]
Dvalid_preR6.s23lhue $s2,-256($v1) # CHECK: lhue $18, -256($3) # encoding: [0x7c,0x72,0x80,0x29]
24lhue $s2,255($v1) # CHECK: lhue $18, 255($3) # encoding: [0x7c,0x72,0x7f,0xa9]
25lhue $s6,-168($v0) # CHECK: lhue $22, -168($2) # encoding: [0x7c,0x56,0xac,0x29]
Dinvalid-noeva-wrong-error.s34lhue $s2,-256($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
35lhue $s2,255($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
36lhue $s6,-168($v0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
/external/llvm/test/MC/Mips/eva/
Dvalid_R6.s19lhue $s2,-256($v1) # CHECK: lhue $18, -256($3) # encoding: [0x7c,0x72,0x80,0x29]
20lhue $s2,255($v1) # CHECK: lhue $18, 255($3) # encoding: [0x7c,0x72,0x7f,0xa9]
21lhue $s6,-168($v0) # CHECK: lhue $22, -168($2) # encoding: [0x7c,0x56,0xac,0x29]
Dvalid_preR6.s23lhue $s2,-256($v1) # CHECK: lhue $18, -256($3) # encoding: [0x7c,0x72,0x80,0x29]
24lhue $s2,255($v1) # CHECK: lhue $18, 255($3) # encoding: [0x7c,0x72,0x7f,0xa9]
25lhue $s6,-168($v0) # CHECK: lhue $22, -168($2) # encoding: [0x7c,0x56,0xac,0x29]
Dinvalid-noeva-wrong-error.s34lhue $s2,-256($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
35lhue $s2,255($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
36lhue $s6,-168($v0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
/external/llvm-project/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_R6-eva.txt16 0x7c 0x72 0x80 0x29 # CHECK: lhue $18, -256($3)
17 0x7c 0x72 0x7f 0xa9 # CHECK: lhue $18, 255($3)
18 0x7c 0x56 0xac 0x29 # CHECK: lhue $22, -168($2)
Dvalid_preR6-eva.txt20 0x7c 0x72 0x80 0x29 # CHECK: lhue $18, -256($3)
21 0x7c 0x72 0x7f 0xa9 # CHECK: lhue $18, 255($3)
22 0x7c 0x56 0xac 0x29 # CHECK: lhue $22, -168($2)
/external/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_R6-eva.txt16 0x7c 0x72 0x80 0x29 # CHECK: lhue $18, -256($3)
17 0x7c 0x72 0x7f 0xa9 # CHECK: lhue $18, 255($3)
18 0x7c 0x56 0xac 0x29 # CHECK: lhue $22, -168($2)
Dvalid_preR6-eva.txt20 0x7c 0x72 0x80 0x29 # CHECK: lhue $18, -256($3)
21 0x7c 0x72 0x7f 0xa9 # CHECK: lhue $18, 255($3)
22 0x7c 0x56 0xac 0x29 # CHECK: lhue $22, -168($2)
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips32r6-eva.s20 # CHECK-EL: lhue $4, 8($2) # encoding: [0x82,0x60,0x08,0x62]
47 # CHECK-EB: lhue $4, 8($2) # encoding: [0x60,0x82,0x62,0x08]
68 lhue $4, 8($2)
Dmicromips-eva.s28 # CHECK-EL: lhue $4, 8($2) # encoding: [0x82,0x60,0x08,0x62]
63 # CHECK-EB: lhue $4, 8($2) # encoding: [0x60,0x82,0x62,0x08]
88 lhue $4, 8($2)
/external/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s47 # CHECK-EL: lhue $4, 8($2) # encoding: [0x82,0x60,0x08,0x62]
93 # CHECK-EB: lhue $4, 8($2) # encoding: [0x60,0x82,0x62,0x08]
136 lhue $4, 8($2)
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dinvalid.s89 lhue $36, 8($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
93 lhue $4, 8($37) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
100lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
101lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
Dvalid.s288 lhue $4, 8($2) # CHECK: lhue $4, 8($2) # encoding: [0x60,0x82,0x62,0x08] label
/external/llvm/test/MC/Mips/micromips/
Dinvalid.s89 lhue $36, 8($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
93lhue $4, 8($37) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
100lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
101lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
/external/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s178 lhue $36, 8($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
182lhue $4, 8($37) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed …
189lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed …
190lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed …
/external/llvm/test/MC/Mips/micromips64r6/
Dinvalid.s210lhue $36, 8($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
214lhue $4, 8($37) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
221lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
222lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
Dvalid.s192 lhue $4, 8($2) # CHECK: lhue $4, 8($2) # encoding: [0x60,0x82,0x62,0x08]
/external/llvm-project/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s189 lhue $36, 8($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
193 lhue $4, 8($37) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number
200lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed …
201lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed …
/external/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td69 class LHuE_DESC : LOAD_EVA_DESC_BASE<"lhue", GPR32Opnd, II_LHUE>;
/external/llvm-project/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td69 class LHuE_DESC : LOAD_EVA_DESC_BASE<"lhue", GPR32Opnd, II_LHUE>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td69 class LHuE_DESC : LOAD_EVA_DESC_BASE<"lhue", GPR32Opnd, II_LHUE>;
/external/llvm-project/llvm/test/CodeGen/Mips/
Dmicromips-eva.mir203 # CHECK: 60 22 62 0a lhue $1, 10($2)
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt176 0x82 0x60 0x08 0x62 # CHECK: lhue $4, 8($2)

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