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Searched refs:li16 (Results 1 – 25 of 56) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Mips/cstmaterialization/
DconstMaterialization.ll6 ; Constants generated using li16
11 ; MM: li16 $2, -1
14 ; MIPS-NOT: li16
24 ; MM: li16 $2, 126
28 ; MIPS-NOT: li16
40 ; ALL-NOT: li16
49 ; MM: li16 $2, 0
52 ; MIPS-NOT: li16
64 ; ALL-NOT: li16
76 ; ALL-NOT: li16
[all …]
Disel-materialization.ll8 ; The four parameters are picked to use these instructions: li16, addiu, lui,
/external/llvm-project/llvm/test/Analysis/CostModel/SystemZ/
Dext-load.ll12 %li16 = load i16, i16* undef
13 sext i16 %li16 to i32
14 sext i16 %li16 to i64
25 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %li16 = load i16, i16* undef
26 ; CHECK: Cost Model: Found an estimated cost of 0 for instruction: %4 = sext i16 %li16 to i32
27 ; CHECK: Cost Model: Found an estimated cost of 0 for instruction: %5 = sext i16 %li16 to i64
38 %li16 = load i16, i16* undef
39 zext i16 %li16 to i32
40 zext i16 %li16 to i64
51 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %li16 = load i16, i16* undef
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/
Dfcmp.ll30 ; MM-DAG: li16 $2, 0
56 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
57 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
89 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
90 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
122 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
123 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
155 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
156 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
188 ; MM32R3-DAG: li16 $[[T0:[0-9]+]], 0
[all …]
Dmicromips-pseudo-mtlohi-expand.ll10 ; MMR2-NEXT: li16 $2, 0 # <MCInst #{{[0-9]+}} LI16_MM
13 ; MMR2-NEXT: li16 $3, 1 # <MCInst #{{[0-9]+}} LI16_MM
32 ; MMR2-DSP-NEXT: li16 $2, 0 # <MCInst #{{[0-9]+}} LI16_MM
35 ; MMR2-DSP-NEXT: li16 $3, 1 # <MCInst #{{[0-9]+}} LI16_MM
Dmicromips-li.ll17 ; CHECK: li16 ${{[2-7]|16|17}}, 1
Dmicromips-short-delay-slot.mir9 # CHECK-NEXT: li16
Drotate.ll10 ; MM32: li16 $2, 32
Dlongbranch.ll225 ; MICROMIPS-NEXT: li16 $3, 1
238 ; MICROMIPSSTATIC-NEXT: li16 $2, 1
250 ; MICROMIPSR6STATIC-NEXT: li16 $2, 1
274 ; MICROMIPSR6PIC-NEXT: li16 $3, 1
Dpseudo-jump-fill.ll18 ; CHECK-NEXT: li16 $2, 0
/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Dand.ll393 ; MM32R3-NEXT: li16 $2, 0
398 ; MM32R6-NEXT: li16 $2, 0
577 ; MM32R3-NEXT: li16 $2, 0
583 ; MM32R6-NEXT: li16 $2, 0
636 ; MM32R3-NEXT: li16 $2, 0
637 ; MM32R3-NEXT: li16 $3, 0
638 ; MM32R3-NEXT: li16 $4, 0
644 ; MM32R6-NEXT: li16 $2, 0
645 ; MM32R6-NEXT: li16 $3, 0
646 ; MM32R6-NEXT: li16 $4, 0
[all …]
Dlshr.ll372 ; MMR3-NEXT: li16 $5, 0
782 ; MMR3-NEXT: li16 $2, 64
789 ; MMR3-NEXT: li16 $2, 0
834 ; MMR3-NEXT: li16 $6, 0
839 ; MMR3-NEXT: li16 $7, 0
844 ; MMR3-NEXT: li16 $7, 0
849 ; MMR3-NEXT: li16 $4, 0
887 ; MMR6-NEXT: li16 $17, 64
919 ; MMR6-NEXT: li16 $5, 0
Dshl.ll432 ; MMR3-NEXT: li16 $5, 0
857 ; MMR3-NEXT: li16 $2, 64
862 ; MMR3-NEXT: li16 $3, 0
908 ; MMR3-NEXT: li16 $5, 0
913 ; MMR3-NEXT: li16 $7, 0
918 ; MMR3-NEXT: li16 $7, 0
923 ; MMR3-NEXT: li16 $3, 0
951 ; MMR6-NEXT: li16 $17, 64
983 ; MMR6-NEXT: li16 $4, 0
Dselect-int.ll260 ; MM32R3: li16 $[[T0:[0-9]+]], -1
262 ; MM32R3: li16 $[[T2:[0-9]+]], 0
266 ; MM32R6: li16 $[[T0:[0-9]+]], -1
Dor.ll383 ; MM32-NEXT: li16 $2, -1
388 ; MM32R6-NEXT: li16 $2, -1
550 ; MM32-NEXT: li16 $2, -1
555 ; MM32R6-NEXT: li16 $2, -1
575 ; MM32-NEXT: li16 $2, -1
580 ; MM32R6-NEXT: li16 $2, -1
888 ; MM32-NEXT: li16 $2, -1
893 ; MM32R6-NEXT: li16 $2, -1
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s32 # CHECK-EL: li16 $3, -1 # encoding: [0xff,0xed]
33 # CHECK-EL: li16 $3, 126 # encoding: [0xfe,0xed]
87 # CHECK-EB: li16 $3, -1 # encoding: [0xed,0xff]
88 # CHECK-EB: li16 $3, 126 # encoding: [0xed,0xfe]
140 li16 $3, -1
141 li16 $3, 126
/external/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s32 # CHECK-EL: li16 $3, -1 # encoding: [0xff,0xed]
33 # CHECK-EL: li16 $3, 126 # encoding: [0xfe,0xed]
87 # CHECK-EB: li16 $3, -1 # encoding: [0xed,0xff]
88 # CHECK-EB: li16 $3, 126 # encoding: [0xed,0xfe]
140 li16 $3, -1
141 li16 $3, 126
/external/llvm/test/CodeGen/Mips/
Dfcmp.ll59 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
93 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
127 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
161 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
195 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
231 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
268 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
303 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
337 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
371 ; MM32R3-DAG: li16 $[[T1:[0-9]+]], 1
[all …]
Dmicromips-li.ll16 ; CHECK: li16 ${{[2-7]|16|17}}, 1
Drotate.ll10 ; MM32: li16 $2, 32
/external/llvm-project/llvm/test/CodeGen/Mips/micromips-sizereduction/
Dmicromips-lwp-swp.ll21 ; CHECK-NEXT: li16 $2, 0
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dadd.ll254 ; MM32: li16 $[[T1:[0-9]+]], 4
284 ; MM32: li16 $[[T1:[0-9]+]], 4
384 ; MM32: li16 $[[T1:[0-9]+]], 3
414 ; MM32: li16 $[[T1:[0-9]+]], 3
Dor.ll230 ; MM: li16 $2, -1
318 ; MM: li16 $2, -1
332 ; MM: li16 $2, -1
501 ; MM: li16 $2, -1
Dselect-int.ll256 ; MM32R3: li16 $[[T0:[0-9]+]], -1
262 ; MM32R6: li16 $[[T0:[0-9]+]], -1
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dinvalid.s36 li16 $4, -2 # CHECK: :[[@LINE]]:12: error: expected immediate in range -1 .. 126
37 li16 $4, 127 # CHECK: :[[@LINE]]:12: error: expected immediate in range -1 .. 126

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