Searched refs:link_width (Results 1 – 3 of 3) sorted by relevance
510 unsigned int link_width, serdes, nr_serdes; in paxb_serdes_gate_clock() local515 link_width = paxb->get_link_width(core_idx); in paxb_serdes_gate_clock()516 if (!link_width) { in paxb_serdes_gate_clock()521 nr_serdes = link_width / 2; in paxb_serdes_gate_clock()764 unsigned int link_width; in paxb_sr_phy_init() local768 link_width = paxb->get_link_width(core_idx); in paxb_sr_phy_init()769 if (!link_width) { in paxb_sr_phy_init()774 ret = paxb_serdes_init(core_idx, link_width / 2); in paxb_sr_phy_init()782 ret = paxb_gen3_serdes_init(core_idx, link_width / 2); in paxb_sr_phy_init()
265 static void pcie_set_default_tx_coeff(uint32_t core_idx, uint32_t link_width) in pcie_set_default_tx_coeff() argument271 for (lanes = 0; lanes < link_width; lanes = lanes + 2) { in pcie_set_default_tx_coeff()287 unsigned int link_width; in paxb_rc_link_init() local294 link_width = paxb->get_link_width(core_idx); in paxb_rc_link_init()295 if (!link_width) { in paxb_rc_link_init()304 val |= (link_width << CFG_RC_LINK_CAP_WIDTH_SHIFT); in paxb_rc_link_init()326 pcie_set_default_tx_coeff(core_idx, link_width); in paxb_rc_link_init()
77 __u8 link_width; member