| /external/mesa3d/src/intel/compiler/ |
| D | brw_nir_lower_mem_access_bit_sizes.c | 102 const int load_offset = nir_src_as_uint(*offset_src) % 4; in lower_mem_load_bit_size() local
103 assert(load_offset % (bit_size / 8) == 0); in lower_mem_load_bit_size()
104 const unsigned load_comps32 = DIV_ROUND_UP(bytes_read + load_offset, 4); in lower_mem_load_bit_size()
110 nir_ssa_def *load = dup_mem_intrinsic(b, intrin, NULL, -load_offset, in lower_mem_load_bit_size()
112 result = nir_extract_bits(b, &load, 1, load_offset * 8, in lower_mem_load_bit_size()
120 int load_offset = 0; in lower_mem_load_bit_size() local
121 while (load_offset < bytes_read) { in lower_mem_load_bit_size()
122 const unsigned bytes_left = bytes_read - load_offset; in lower_mem_load_bit_size()
129 assert(load_offset % 4 == 0); in lower_mem_load_bit_size()
135 loads[num_loads++] = dup_mem_intrinsic(b, intrin, NULL, load_offset, in lower_mem_load_bit_size()
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| D | brw_vec4_nir.cpp | 409 unsigned load_offset = nir_src_as_uint(instr->src[0]); in nir_emit_intrinsic() local
414 src = src_reg(ATTR, instr->const_index[0] + load_offset, in nir_emit_intrinsic()
594 const unsigned load_offset = nir_src_as_uint(instr->src[0]); in nir_emit_intrinsic() local
596 assert(load_offset % 4 == 0); in nir_emit_intrinsic()
600 unsigned offset = load_offset + shift * type_size; in nir_emit_intrinsic()
652 unsigned load_offset = nir_src_as_uint(instr->src[1]); in nir_emit_intrinsic() local
653 offset_reg = brw_imm_ud(load_offset & ~15); in nir_emit_intrinsic()
686 unsigned load_offset = nir_src_as_uint(instr->src[1]); in nir_emit_intrinsic() local
689 BRW_SWIZZLE4(load_offset % 16 / type_size, in nir_emit_intrinsic()
690 load_offset % 16 / type_size, in nir_emit_intrinsic()
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| D | brw_fs_nir.cpp | 3404 const unsigned load_offset = nir_src_as_uint(instr->src[0]); in nir_emit_fs_intrinsic() local
3405 const unsigned target = l - FRAG_RESULT_DATA0 + load_offset; in nir_emit_fs_intrinsic()
4466 unsigned load_offset = nir_src_as_uint(instr->src[0]); in nir_emit_intrinsic() local
4467 assert(load_offset % type_sz(dest.type) == 0); in nir_emit_intrinsic()
4471 src.offset = load_offset + instr->const_index[0] % 4; in nir_emit_intrinsic()
4557 const unsigned load_offset = nir_src_as_uint(instr->src[1]); in nir_emit_intrinsic() local
4562 const unsigned offset_256b = load_offset / 32; in nir_emit_intrinsic()
4572 push_reg.offset = load_offset - 32 * range->start; in nir_emit_intrinsic()
4593 const unsigned base = load_offset + c * type_size; in nir_emit_intrinsic()
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| /external/linux-kselftest/tools/testing/selftests/vDSO/ |
| D | parse_vdso.c | 67 uintptr_t load_offset; /* load_addr - recorded vaddr */ member
123 vdso_info.load_offset = base in vdso_init_from_sysinfo_ehdr()
147 + vdso_info.load_offset); in vdso_init_from_sysinfo_ehdr()
152 + vdso_info.load_offset); in vdso_init_from_sysinfo_ehdr()
157 + vdso_info.load_offset); in vdso_init_from_sysinfo_ehdr()
162 + vdso_info.load_offset); in vdso_init_from_sysinfo_ehdr()
167 + vdso_info.load_offset); in vdso_init_from_sysinfo_ehdr()
254 return (void *)(vdso_info.load_offset + sym->st_value); in vdso_sym()
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| /external/llvm-project/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/ |
| D | DynamicLoaderPOSIXDYLD.cpp | 106 addr_t load_offset = ComputeLoadOffset(); in DidAttach() local
114 load_offset); in DidAttach()
119 bool rebase_exec = load_offset != LLDB_INVALID_ADDRESS; in DidAttach()
148 UpdateLoadedSections(executable_sp, LLDB_INVALID_ADDRESS, load_offset, in DidAttach()
182 addr_t load_offset; in DidLaunch() local
187 load_offset = ComputeLoadOffset(); in DidLaunch()
190 if (executable.get() && load_offset != LLDB_INVALID_ADDRESS) { in DidLaunch()
193 UpdateLoadedSections(executable, LLDB_INVALID_ADDRESS, load_offset, true); in DidLaunch()
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| /external/mesa3d/src/compiler/glsl/ |
| D | lower_shared_reference.cpp | 160 ir_variable *load_offset = new(mem_ctx) ir_variable(glsl_type::uint_type, in handle_rvalue() local
163 base_ir->insert_before(load_offset); in handle_rvalue()
164 base_ir->insert_before(assign(load_offset, offset)); in handle_rvalue()
168 emit_access(mem_ctx, false, deref, load_offset, const_offset, row_major, in handle_rvalue()
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| D | lower_ubo_reference.cpp | 381 ir_variable *load_offset = new(mem_ctx) ir_variable(glsl_type::uint_type, in handle_rvalue() local
384 base_ir->insert_before(load_offset); in handle_rvalue()
385 base_ir->insert_before(assign(load_offset, offset)); in handle_rvalue()
388 emit_access(mem_ctx, false, deref, load_offset, const_offset, in handle_rvalue()
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| /external/llvm-project/lldb/source/Plugins/DynamicLoader/Hexagon-DYLD/ |
| D | DynamicLoaderHexagonDYLD.cpp | 126 addr_t load_offset; in DidAttach() local
132 load_offset = ComputeLoadOffset(); in DidAttach()
149 if (load_offset != LLDB_INVALID_ADDRESS) in DidAttach()
150 UpdateLoadedSections(executable, LLDB_INVALID_ADDRESS, load_offset, true); in DidAttach()
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| /external/mesa3d/src/gallium/drivers/lima/ir/gp/ |
| D | codegen.h | 138 gpir_codegen_load_off load_offset : 3; member
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| D | disasm.c | 151 switch (instr->load_offset) { in print_src()
164 printf("+unk%d", instr->load_offset); in print_src()
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| D | codegen.c | 478 code->load_offset = gpir_codegen_load_off_none; in gpir_codegen_mem_slot()
483 code->load_offset = gpir_codegen_load_off_none; in gpir_codegen_mem_slot()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_query.c | 206 nir_ssa_def *load_offset = nir_imul(&b, current_outer_count, nir_imm_int(&b, 16)); in build_occlusion_query_shader() local
207 load_offset = nir_iadd(&b, input_base, load_offset); in build_occlusion_query_shader()
211 load->src[1] = nir_src_for_ssa(load_offset); in build_occlusion_query_shader()
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| /external/pcre/dist2/src/ |
| D | pcre2_jit_compile.c | 2268 …ic void delayed_mem_copy_move(delayed_mem_copy_status *status, int load_base, sljit_sw load_offset, in delayed_mem_copy_move() argument
2286 OP1(SLJIT_MOV, tmp_reg, 0, SLJIT_MEM1(load_base), load_offset); in delayed_mem_copy_move()
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