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Searched refs:logical_level0_px (Results 1 – 19 of 19) sorted by relevance

/external/mesa3d/src/intel/blorp/
Dblorp.c87 assert(layer < MAX2(surf->surf->logical_level0_px.depth >> level, in brw_blorp_surface_info_init()
88 surf->surf->logical_level0_px.array_len)); in brw_blorp_surface_info_init()
116 info->view.array_len = MAX2(info->surf.logical_level0_px.depth, in brw_blorp_surface_info_init()
117 info->surf.logical_level0_px.array_len); in brw_blorp_surface_info_init()
148 assert(info->surf.logical_level0_px.array_len == 1); in brw_blorp_surface_info_init()
159 info->surf.logical_level0_px.w += surf->tile_x_sa; in brw_blorp_surface_info_init()
160 info->surf.logical_level0_px.h += surf->tile_y_sa; in brw_blorp_surface_info_init()
364 params.x1 = minify(params.depth.surf.logical_level0_px.width, in blorp_hiz_op()
366 params.y1 = minify(params.depth.surf.logical_level0_px.height, in blorp_hiz_op()
373 params.depth.surf.logical_level0_px.width = params.x1; in blorp_hiz_op()
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Dblorp_clear.c514 if (params.dst.surf.logical_level0_px.width > max_image_width) { in blorp_clear()
523 assert(params.dst.surf.logical_level0_px.depth == 1); in blorp_clear()
524 assert(params.dst.surf.logical_level0_px.array_len == 1); in blorp_clear()
535 params.dst.surf.logical_level0_px.width = max_fake_rgb_width; in blorp_clear()
643 assert(params.dst.surf.logical_level0_px.width % wide_Bpp == 0); in blorp_clear_stencil_as_rgba()
644 params.dst.surf.logical_level0_px.width /= wide_Bpp; in blorp_clear_stencil_as_rgba()
705 params.dst.surf.logical_level0_px = in blorp_clear_depth_stencil()
706 params.stencil.surf.logical_level0_px; in blorp_clear_depth_stencil()
728 params.dst.surf.logical_level0_px = in blorp_clear_depth_stencil()
729 params.depth.surf.logical_level0_px; in blorp_clear_depth_stencil()
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Dblorp_blit.c1579 info->surf.levels == 1 && info->surf.logical_level0_px.array_len == 1) in blorp_surf_convert_to_single_slice()
1608 info->surf.logical_level0_px.w += tile_x_px; in blorp_surf_convert_to_single_slice()
1609 info->surf.logical_level0_px.h += tile_y_px; in blorp_surf_convert_to_single_slice()
1630 info->surf.logical_level0_px = info->surf.phys_level0_sa; in blorp_surf_fake_interleaved_msaa()
1668 info->surf.logical_level0_px.width = in blorp_surf_retile_w_to_y()
1669 ALIGN(info->surf.logical_level0_px.width, x_align) * 2; in blorp_surf_retile_w_to_y()
1670 info->surf.logical_level0_px.height = in blorp_surf_retile_w_to_y()
1671 ALIGN(info->surf.logical_level0_px.height, y_align) / 2; in blorp_surf_retile_w_to_y()
1776 info->surf.logical_level0_px.width *= 3; in surf_fake_rgb_with_red()
2035 1.0f / minify(params->src.surf.logical_level0_px.width, in try_blorp_blit()
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Dblorp_genX_exec.h1412 assert(surf.logical_level0_px.height == 1); in blorp_emit_surface_state()
1501 .Width = surface->surf.logical_level0_px.width - 1, in blorp_emit_null_surface_state()
1502 .Height = surface->surf.logical_level0_px.height - 1, in blorp_emit_null_surface_state()
/external/mesa3d/src/intel/isl/
Disl_emit_depth_stencil.c72 db.Width = info->depth_surf->logical_level0_px.width - 1; in isl_genX()
73 db.Height = info->depth_surf->logical_level0_px.height - 1; in isl_genX()
75 db.Depth = info->depth_surf->logical_level0_px.depth - 1; in isl_genX()
79 db.Width = info->stencil_surf->logical_level0_px.width - 1; in isl_genX()
80 db.Height = info->stencil_surf->logical_level0_px.height - 1; in isl_genX()
82 db.Depth = info->stencil_surf->logical_level0_px.depth - 1; in isl_genX()
162 sb.Width = info->stencil_surf->logical_level0_px.width - 1; in isl_genX()
163 sb.Height = info->stencil_surf->logical_level0_px.height - 1; in isl_genX()
Disl.c1615 const struct isl_extent4d logical_level0_px = { in isl_surf_init_s() local
1765 .logical_level0_px = logical_level0_px, in isl_surf_init_s()
1887 .width = surf->logical_level0_px.width, in isl_surf_get_hiz_surf()
1888 .height = surf->logical_level0_px.height, in isl_surf_get_hiz_surf()
1889 .depth = surf->logical_level0_px.depth, in isl_surf_get_hiz_surf()
1891 .array_len = surf->logical_level0_px.array_len, in isl_surf_get_hiz_surf()
1913 assert(surf->logical_level0_px.depth == 1); in isl_surf_get_mcs_surf()
1936 if (surf->samples == 16 && surf->logical_level0_px.width > 8192) in isl_surf_get_mcs_surf()
1952 .width = surf->logical_level0_px.width, in isl_surf_get_mcs_surf()
1953 .height = surf->logical_level0_px.height, in isl_surf_get_mcs_surf()
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Disl_storage_image.c233 surf->logical_level0_px.array_len); in isl_surf_fill_image_param()
235 param->size[0] = isl_minify(surf->logical_level0_px.w, view->base_level); in isl_surf_fill_image_param()
238 isl_minify(surf->logical_level0_px.h, view->base_level); in isl_surf_fill_image_param()
241 isl_minify(surf->logical_level0_px.d, view->base_level); in isl_surf_fill_image_param()
Disl_surface_state.c332 assert(info->surf->logical_level0_px.width > 0 && in isl_genX()
333 info->surf->logical_level0_px.height > 0); in isl_genX()
335 s.Width = info->surf->logical_level0_px.width - 1; in isl_genX()
336 s.Height = info->surf->logical_level0_px.height - 1; in isl_genX()
352 (info->surf->logical_level0_px.height % 4) == 1) in isl_genX()
407 s.Depth = info->surf->logical_level0_px.depth - 1; in isl_genX()
560 assert(info->surf->logical_level0_px.array_len == 1); in isl_genX()
Disl.h1261 struct isl_extent4d logical_level0_px; member
2112 return isl_extent4d(DIV_ROUND_UP(surf->logical_level0_px.w, fmtl->bw), in isl_surf_get_logical_level0_el()
2113 DIV_ROUND_UP(surf->logical_level0_px.h, fmtl->bh), in isl_surf_get_logical_level0_el()
2114 DIV_ROUND_UP(surf->logical_level0_px.d, fmtl->bd), in isl_surf_get_logical_level0_el()
2115 surf->logical_level0_px.a); in isl_surf_get_logical_level0_el()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_mipmap_tree.c236 return minify(mt->surf.logical_level0_px.depth, level); in brw_get_num_logical_layers()
238 return mt->surf.logical_level0_px.array_len; in brw_get_num_logical_layers()
723 assert(mt->surf.logical_level0_px.depth == 1); in create_ccs_buf_for_image()
724 assert(mt->surf.logical_level0_px.array_len == 1); in create_ccs_buf_for_image()
936 irb->mt->surf.logical_level0_px.width != width || in intel_update_winsys_renderbuffer_miptree()
937 irb->mt->surf.logical_level0_px.height != height) { in intel_update_winsys_renderbuffer_miptree()
1115 minify(mt->surf.logical_level0_px.depth, level) : in intel_miptree_match_image()
1116 mt->surf.logical_level0_px.array_len; in intel_miptree_match_image()
1118 return width == minify(mt->surf.logical_level0_px.width, level) && in intel_miptree_match_image()
1119 height == minify(mt->surf.logical_level0_px.height, level) && in intel_miptree_match_image()
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Dintel_tex_image.c66 old_width = old_mt->surf.logical_level0_px.width; in intel_miptree_create_for_teximage()
67 old_height = old_mt->surf.logical_level0_px.height; in intel_miptree_create_for_teximage()
69 old_mt->surf.logical_level0_px.depth : in intel_miptree_create_for_teximage()
70 old_mt->surf.logical_level0_px.array_len; in intel_miptree_create_for_teximage()
257 assert(image->mt->surf.logical_level0_px.depth == 1); in intel_texsubimage_tiled_memcpy()
258 assert(image->mt->surf.logical_level0_px.array_len == 1); in intel_texsubimage_tiled_memcpy()
416 mt->surf.logical_level0_px.width, in intel_set_texture_image_mt()
417 mt->surf.logical_level0_px.height, 1, in intel_set_texture_image_mt()
810 assert(image->mt->surf.logical_level0_px.depth == 1); in intel_gettexsubimage_tiled_memcpy()
811 assert(image->mt->surf.logical_level0_px.array_len == 1); in intel_gettexsubimage_tiled_memcpy()
Dbrw_wm_surface_state.c116 surf->logical_level0_px.width = minify(surf->logical_level0_px.width, l); in get_isl_surf()
117 surf->logical_level0_px.height = surf->dim <= ISL_SURF_DIM_1D ? 1 : in get_isl_surf()
118 minify(surf->logical_level0_px.height, l); in get_isl_surf()
119 surf->logical_level0_px.depth = surf->dim <= ISL_SURF_DIM_2D ? 1 : in get_isl_surf()
120 minify(surf->logical_level0_px.depth, l); in get_isl_surf()
125 surf->logical_level0_px.array_len = 1; in get_isl_surf()
497 mt->surf.logical_level0_px.depth : in brw_update_texture_surface()
498 mt->surf.logical_level0_px.array_len; in brw_update_texture_surface()
1551 num_layers = minify(mt->surf.logical_level0_px.depth, u->Level); in update_image_surface()
1557 mt->surf.logical_level0_px.array_len; in update_image_surface()
Dbrw_clear.c127 mt->surf.logical_level0_px.width, in brw_fast_clear_depth()
128 mt->surf.logical_level0_px.height); in brw_fast_clear_depth()
Dbrw_generate_mipmap.c98 const struct isl_extent4d *base_size = &mt->surf.logical_level0_px; in brw_generate_mipmap()
Dintel_blit.c585 minify(src_mt->surf.logical_level0_px.width, src_level)); in intel_miptree_copy()
588 minify(src_mt->surf.logical_level0_px.height, src_level)); in intel_miptree_copy()
Dintel_fbo.c556 minify(mt->surf.logical_level0_px.depth, level) : in intel_renderbuffer_update_wrapper()
557 mt->surf.logical_level0_px.array_len; in intel_renderbuffer_update_wrapper()
/external/mesa3d/src/gallium/drivers/iris/
Diris_state.c2317 surf->logical_level0_px.width = minify(surf->logical_level0_px.width, l); in get_rt_read_isl_surf()
2318 surf->logical_level0_px.height = surf->dim <= ISL_SURF_DIM_1D ? 1 : in get_rt_read_isl_surf()
2319 minify(surf->logical_level0_px.height, l); in get_rt_read_isl_surf()
2320 surf->logical_level0_px.depth = surf->dim <= ISL_SURF_DIM_2D ? 1 : in get_rt_read_isl_surf()
2321 minify(surf->logical_level0_px.depth, l); in get_rt_read_isl_surf()
2323 surf->logical_level0_px.array_len = 1; in get_rt_read_isl_surf()
2678 isl_surf.logical_level0_px = isl_surf_get_logical_level0_el(&isl_surf); in iris_create_surface()
2683 psurf->width = isl_surf.logical_level0_px.width; in iris_create_surface()
2684 psurf->height = isl_surf.logical_level0_px.height; in iris_create_surface()
Diris_resource.c398 return minify(res->surf.logical_level0_px.depth, level); in iris_get_num_logical_layers()
400 return res->surf.logical_level0_px.array_len; in iris_get_num_logical_layers()
/external/mesa3d/src/intel/vulkan/
Danv_image.c1841 tmp_surf.logical_level0_px = in anv_image_fill_surface_state()