| /external/llvm-project/llvm/test/MC/ARM/ |
| D | thumbv8.1m.s | 178 wls lr, r2, .Lend
183 wls lr, r2, #0
188 dls lr, r2
193 le lr, .Lstart
203 dls lr, lr
208 dls lr, r0
213 dls lr, r1
218 dls lr, r10
223 dls lr, r11
228 dls lr, r12
[all …]
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| D | mve-misc.s | 17 # CHECK: wlstp.8 lr, r0, #1668 @ encoding: [0x00,0xf0,0x43,0xc3]
19 wlstp.8 lr, r0, #1668
21 # CHECK: wlstp.16 lr, r0, #1668 @ encoding: [0x10,0xf0,0x43,0xc3]
23 wlstp.16 lr, r0, #1668
25 # CHECK: wlstp.32 lr, r4, #2706 @ encoding: [0x24,0xf0,0x49,0xcd]
27 wlstp.32 lr, r4, #2706
29 # CHECK: wlstp.64 lr, lr, #3026 @ encoding: [0x3e,0xf0,0xe9,0xcd]
31 wlstp.64 lr, lr, #3026
33 # CHECK: wlstp.8 lr, r5, #3436 @ encoding: [0x05,0xf0,0xb7,0xc6]
35 wlstp.8 lr, r5, #3436
[all …]
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| D | mve-scalar-shift.s | 15 # CHECK: asrl lr, r1, #27 @ encoding: [0x5e,0xea,0xef,0x61]
17 asrl lr, r1, #27
20 # CHECK-NEXT: asrleq lr, r1, #27 @ encoding: [0x5e,0xea,0xef,0x61]
22 asrleq lr, r1, #27
50 # CHECK: cinc lr, r2, lo @ encoding: [0x52,0xea,0x22,0x9e]
51 # CHECK-NOMVE: cinc lr, r2, lo @ encoding: [0x52,0xea,0x22,0x9e]
52 csinc lr, r2, r2, hs
54 # CHECK: cinc lr, r7, pl @ encoding: [0x57,0xea,0x47,0x9e]
55 # CHECK-NOMVE: cinc lr, r7, pl @ encoding: [0x57,0xea,0x47,0x9e]
56 cinc lr, r7, pl
[all …]
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| D | mve-reductions.s | 26 # CHECK: vaddv.s16 lr, q0 @ encoding: [0xf5,0xee,0x00,0xef]
27 vaddv.s16 lr, q0
39 # CHECK: vaddva.s16 lr, q0 @ encoding: [0xf5,0xee,0x20,0xef]
40 vaddva.s16 lr, q0
43 # CHECK: vaddvat.s16 lr, q0 @ encoding: [0xf5,0xee,0x20,0xef]
44 # CHECK: vaddvae.s16 lr, q0 @ encoding: [0xf5,0xee,0x20,0xef]
46 vaddvat.s16 lr, q0
47 vaddvae.s16 lr, q0
61 # CHECK: vminv.s8 lr, q0 @ encoding: [0xe2,0xee,0x80,0xef]
62 vminv.s8 lr, q0
[all …]
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| D | mve-reductions-fp.s | 7 # CHECK: vminnmv.f16 lr, q3 @ encoding: [0xee,0xfe,0x86,0xef]
8 # CHECK-NOFP-NOT: vminnmv.f16 lr, q3 @ encoding: [0xee,0xfe,0x86,0xef]
10 vminnmv.f16 lr, q3
12 # CHECK: vminnmv.f32 lr, q1 @ encoding: [0xee,0xee,0x82,0xef]
13 # CHECK-NOFP-NOT: vminnmv.f32 lr, q1 @ encoding: [0xee,0xee,0x82,0xef]
15 vminnmv.f32 lr, q1
17 # CHECK: vminnmav.f16 lr, q0 @ encoding: [0xec,0xfe,0x80,0xef]
18 # CHECK-NOFP-NOT: vminnmav.f16 lr, q0 @ encoding: [0xec,0xfe,0x80,0xef]
20 vminnmav.f16 lr, q0
22 # CHECK: vminnmav.f32 lr, q3 @ encoding: [0xec,0xee,0x86,0xef]
[all …]
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| /external/adhd/cras/src/server/ |
| D | linear_resampler.c | 34 struct linear_resampler *lr; in linear_resampler_create() local
36 lr = (struct linear_resampler *)calloc(1, sizeof(*lr)); in linear_resampler_create()
37 if (!lr) in linear_resampler_create()
39 lr->num_channels = num_channels; in linear_resampler_create()
40 lr->format_bytes = format_bytes; in linear_resampler_create()
42 linear_resampler_set_rates(lr, src_rate, dst_rate); in linear_resampler_create()
44 return lr; in linear_resampler_create()
47 void linear_resampler_destroy(struct linear_resampler *lr) in linear_resampler_destroy() argument
49 if (lr) in linear_resampler_destroy()
50 free(lr); in linear_resampler_destroy()
[all …]
|
| /external/apache-harmony/logging/src/test/java/org/apache/harmony/logging/tests/java/util/logging/ |
| D | LogRecordTest.java | 37 private LogRecord lr; field in LogRecordTest
43 lr = new LogRecord(Level.CONFIG, MSG); in setUp()
64 assertNull(lr.getLoggerName()); in testGetSetLoggerName()
65 lr.setLoggerName(null); in testGetSetLoggerName()
66 assertNull(lr.getLoggerName()); in testGetSetLoggerName()
67 lr.setLoggerName("test logger name"); in testGetSetLoggerName()
68 assertEquals("test logger name", lr.getLoggerName()); in testGetSetLoggerName()
72 assertNull(lr.getResourceBundleName()); in testGetSetResourceBundle()
73 assertNull(lr.getResourceBundle()); in testGetSetResourceBundle()
75 lr.setResourceBundle(null); in testGetSetResourceBundle()
[all …]
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| D | SimpleFormatterTest.java | 35 LogRecord lr; field in SimpleFormatterTest
45 lr = new LogRecord(Level.FINE, MSG); in setUp()
61 lr.setResourceBundle(rb); in testLocalizedFormat()
62 lr.setMessage("msg"); in testLocalizedFormat()
64 String str = sf.format(lr); in testLocalizedFormat()
68 lr.setResourceBundle(null); in testLocalizedFormat()
69 lr.setResourceBundleName("bundles/java/util/logging/res"); in testLocalizedFormat()
70 lr.setMessage("msg"); in testLocalizedFormat()
71 str = sf.format(lr); in testLocalizedFormat()
77 String str = sf.format(lr);
[all …]
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| /external/arm-trusted-firmware/lib/extensions/amu/aarch32/ |
| D | amu_helpers.S | 42 bx lr
44 bx lr
46 bx lr
48 bx lr
78 bx lr
80 bx lr
82 bx lr
84 bx lr
113 bx lr
115 bx lr
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | 2011-02-04-AntidepMultidef.ll | 25 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
27 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
28 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
30 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
39 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
41 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
42 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
44 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
53 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
55 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
[all …]
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | float-helpers.s | 42 ; CHECK-SOFT: .save {r11, lr}
43 ; CHECK-SOFT-NEXT: push {r11, lr}
45 ; CHECK-SOFT-NEXT: pop {r11, lr}
46 ; CHECK-SOFT-NEXT: mov pc, lr
53 ; CHECK-SOFTFP-NEXT: mov pc, lr
57 ; CHECK-HARDFP-SP-NEXT: mov pc, lr
65 ; CHECK-SOFT: .save {r11, lr}
66 ; CHECK-SOFT-NEXT: push {r11, lr}
68 ; CHECK-SOFT-NEXT: pop {r11, lr}
69 ; CHECK-SOFT-NEXT: mov pc, lr
[all …]
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| D | 2011-02-04-AntidepMultidef.ll | 25 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
27 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
28 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
30 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
39 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
41 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
42 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
44 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
53 ; CHECK: umull [[REGISTER:lr|r[0-9]+]],
55 ; CHECK: {{lr|r[0-9]+}}, {{lr|r[0-9]+$}}
[all …]
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| D | machine-outliner-lr-regsave.mir | 20 ; CHECK: liveins: $lr
21 ; CHECK: $r6 = MOVr killed $lr, 14 /* CC::al */, $noreg, $noreg
23 ; CHECK: $lr = MOVr killed $r6, 14 /* CC::al */, $noreg, $noreg
25 ; CHECK: liveins: $lr
26 ; CHECK: $r6 = MOVr killed $lr, 14 /* CC::al */, $noreg, $noreg
28 ; CHECK: $lr = MOVr killed $r6, 14 /* CC::al */, $noreg, $noreg
30 ; CHECK: liveins: $lr
31 ; CHECK: early-clobber $sp = STR_PRE_IMM killed $lr, $sp, -8, 14 /* CC::al */, $noreg
33 ; CHECK: $lr, $sp = LDR_POST_IMM $sp, $noreg, 8, 14 /* CC::al */, $noreg
35 ; CHECK: liveins: $lr, $r0, $r6, $r7, $r8, $r9, $r10, $r11
[all …]
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| /external/llvm-project/llvm/test/CodeGen/Thumb/ |
| D | ldm-stm-postinc.ll | 9 br i1 %1, label %._crit_edge, label %.lr.ph
11 .lr.ph: ; preds = %.lr.ph, %0
12 %i.02 = phi i32 [ %3, %.lr.ph ], [ 0, %0 ]
13 %.01 = phi i32* [ %4, %.lr.ph ], [ %a, %0 ]
18 br i1 %5, label %._crit_edge, label %.lr.ph
20 ._crit_edge: ; preds = %.lr.ph, %0
21 %i.0.lcssa = phi i32 [ 0, %0 ], [ %3, %.lr.ph ]
29 br i1 %1, label %._crit_edge, label %.lr.ph
31 .lr.ph: ; preds = %.lr.ph, %0
32 %i.02 = phi i32 [ %3, %.lr.ph ], [ 0, %0 ]
[all …]
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| /external/llvm-project/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/ |
| D | atomics.ll | 11 ; OPT: .lr.ph:
12 ; OPT: %lsr.iv2 = phi i32 addrspace(3)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
13 ; OPT: %lsr.iv1 = phi i32 addrspace(3)* [ %scevgep, %.lr.ph ], [ %arg0, %.lr.ph.preheader ]
14 ; OPT: %lsr.iv = phi i32 [ %lsr.iv.next, %.lr.ph ], [ %n, %.lr.ph.preheader ]
23 br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
25 .lr.ph.preheader: ; preds = %bb
26 br label %.lr.ph
28 ._crit_edge.loopexit: ; preds = %.lr.ph
34 .lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
35 %indvars.iv = phi i32 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
[all …]
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| D | different-addrspace-addressing-mode-loops.ll | 9 ; OPT: {{^}}.lr.ph:
10 ; OPT: %lsr.iv2 = phi i8 addrspace(1)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
16 br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
18 .lr.ph.preheader: ; preds = %bb
19 br label %.lr.ph
21 ._crit_edge.loopexit: ; preds = %.lr.ph
27 .lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
28 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
40 br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
44 ; OPT: {{^}}.lr.ph.preheader:
[all …]
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | mve-lol.txt | 8 # CHECK: wls lr, r3, #8 <$t.0+0xc>
10 # CHECK: le lr, #-8 <$t.0+0x4>
12 wls lr, r3, #8
14 le lr, #-8
17 # CHECK: wlstp.8 lr, r3, #8 <$t.0+0x18>
19 # CHECK: letp lr, #-8 <$t.0+0x10>
21 wlstp.8 lr, r3, #8
23 letp lr, #-8
26 # CHECK: wlstp.16 lr, r3, #8 <$t.0+0x24>
28 # CHECK: letp lr, #-8 <$t.0+0x1c>
[all …]
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| /external/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/ |
| D | different-addrspace-addressing-mode-loops.ll | 9 ; OPT: {{^}}.lr.ph:
10 ; OPT: %lsr.iv2 = phi i8 addrspace(1)* [ %scevgep3, %.lr.ph ], [ %arg1, %.lr.ph.preheader ]
16 br i1 %tmp, label %.lr.ph.preheader, label %._crit_edge
18 .lr.ph.preheader: ; preds = %bb
19 br label %.lr.ph
21 ._crit_edge.loopexit: ; preds = %.lr.ph
27 .lr.ph: ; preds = %.lr.ph, %.lr.ph.preheader
28 %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 0, %.lr.ph.preheader ]
40 br i1 %exitcond, label %._crit_edge.loopexit, label %.lr.ph
44 ; OPT: {{^}}.lr.ph.preheader:
[all …]
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| /external/libxaac/decoder/armv7/ |
| D | ixheaacd_inv_dit_fft_8pt.s | 29 STMFD sp!, {r4-r12, lr}
41 LDR lr, [r0, #0x10]
43 QADD r10, lr, r6
44 QSUB r6, lr, r6
50 QSUB lr, r12, r10
61 STMIA sp, {r8, lr}
67 LDR lr, [r0, #0x28]
69 QADD r7, r5, lr
72 QSUB r5, r5, lr
73 LDR lr, [r0, #0x18]
[all …]
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| /external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | select-returnaddress-liveins.mir | 20 ; CHECK: liveins: $w0, $x0, $lr
21 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $lr
23 ; CHECK: $lr = COPY [[COPY]]
24 ; CHECK: XPACLRI implicit-def $lr, implicit $lr
25 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $lr
31 ; We should have lr as a livein to bb.0, and a copy from LR.
49 ; CHECK: liveins: $w0, $x0, $lr
50 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $lr
52 ; CHECK: $lr = COPY [[COPY]]
53 ; CHECK: XPACLRI implicit-def $lr, implicit $lr
[all …]
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| /external/arm-trusted-firmware/lib/cpus/aarch32/ |
| D | cortex_a57.S | 22 bx lr
38 bx lr
57 bx lr
72 mov r2, lr
74 mov lr, r2
81 bx lr
101 bx lr
116 mov r2, lr
118 mov lr, r2
125 bx lr
[all …]
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| /external/selinux/libselinux/src/ |
| D | label.c | 150 struct selabel_lookup_rec *lr, in selabel_fini() argument
157 if (compat_validate(rec, lr, path, lr->lineno)) in selabel_fini()
160 if (translating && !lr->ctx_trans && in selabel_fini()
161 selinux_raw_to_trans_context(lr->ctx_raw, &lr->ctx_trans)) in selabel_fini()
171 struct selabel_lookup_rec *lr; in selabel_lookup_common() local
178 lr = rec->func_lookup(rec, key, type); in selabel_lookup_common()
179 if (!lr) in selabel_lookup_common()
182 if (selabel_fini(rec, lr, translating)) in selabel_lookup_common()
185 return lr; in selabel_lookup_common()
192 struct selabel_lookup_rec *lr; in selabel_lookup_bm_common() local
[all …]
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| /external/llvm-project/llvm/test/Transforms/LoopVectorize/ARM/ |
| D | arm-unroll.ll | 18 br i1 %1, label %.lr.ph, label %._crit_edge
20 .lr.ph: ; preds = %0, %.lr.ph
21 %i.02 = phi i32 [ %5, %.lr.ph ], [ 0, %0 ]
22 %sum.01 = phi i32 [ %4, %.lr.ph ], [ 0, %0 ]
28 br i1 %exitcond, label %._crit_edge, label %.lr.ph
30 ._crit_edge: ; preds = %.lr.ph, %0
31 %sum.0.lcssa = phi i32 [ 0, %0 ], [ %4, %.lr.ph ]
41 br i1 %1, label %.lr.ph, label %._crit_edge
43 .lr.ph:
44 %i.02 = phi i32 [ %5, %.lr.ph ], [ 0, %0 ]
[all …]
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| /external/llvm/test/Transforms/LoopVectorize/ARM/ |
| D | arm-unroll.ll | 18 br i1 %1, label %.lr.ph, label %._crit_edge
20 .lr.ph: ; preds = %0, %.lr.ph
21 %i.02 = phi i32 [ %5, %.lr.ph ], [ 0, %0 ]
22 %sum.01 = phi i32 [ %4, %.lr.ph ], [ 0, %0 ]
28 br i1 %exitcond, label %._crit_edge, label %.lr.ph
30 ._crit_edge: ; preds = %.lr.ph, %0
31 %sum.0.lcssa = phi i32 [ 0, %0 ], [ %4, %.lr.ph ]
41 br i1 %1, label %.lr.ph, label %._crit_edge
43 .lr.ph:
44 %i.02 = phi i32 [ %5, %.lr.ph ], [ 0, %0 ]
[all …]
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | machine-outliner-noreturn-save-lr.mir | 26 liveins: $lr
28 ; CHECK: liveins: $lr
29 ; CHECK: $x0 = ORRXrs $xzr, $lr, 0
30 …; CHECK: BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $lr, implicit-def $…
31 ; CHECK: $lr = ORRXrs $xzr, $x0, 0
48 liveins: $lr
50 ; CHECK: liveins: $lr
51 ; CHECK: $x0 = ORRXrs $xzr, $lr, 0
52 …; CHECK: BL @OUTLINED_FUNCTION_0, implicit-def $lr, implicit $sp, implicit-def $lr, implicit-def $…
53 ; CHECK: $lr = ORRXrs $xzr, $x0, 0
[all …]
|