Searched refs:ls_hs_config (Results 1 – 5 of 5) sorted by relevance
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state_draw.c | 88 unsigned offchip_layout, hardware_lds_size, ls_hs_config; in si_emit_derived_tess_state() local
293 ls_hs_config = S_028B58_NUM_PATCHES(*num_patches) | S_028B58_HS_NUM_INPUT_CP(num_tcs_input_cp) | in si_emit_derived_tess_state()
296 if (sctx->last_ls_hs_config != ls_hs_config) { in si_emit_derived_tess_state()
298 radeon_set_context_reg_idx(cs, R_028B58_VGT_LS_HS_CONFIG, 2, ls_hs_config); in si_emit_derived_tess_state()
300 radeon_set_context_reg(cs, R_028B58_VGT_LS_HS_CONFIG, ls_hs_config); in si_emit_derived_tess_state()
302 sctx->last_ls_hs_config = ls_hs_config; in si_emit_derived_tess_state()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_pipe.h | 810 uint32_t ls_hs_config);
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| D | r600_state_common.c | 2250 uint32_t ls_hs_config = evergreen_get_ls_hs_config(rctx, info, in r600_draw_vbo() local
2253 evergreen_set_ls_hs_config(rctx, cs, ls_hs_config); in r600_draw_vbo()
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| D | evergreen_state.c | 4620 uint32_t ls_hs_config) in evergreen_set_ls_hs_config() argument
4622 radeon_set_context_reg(cs, R_028B58_VGT_LS_HS_CONFIG, ls_hs_config); in evergreen_set_ls_hs_config()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_pipeline.c | 4512 unsigned ls_hs_config; in radv_pipeline_generate_tess_state() local
4518 ls_hs_config = S_028B58_NUM_PATCHES(num_patches) | in radv_pipeline_generate_tess_state()
4524 2, ls_hs_config); in radv_pipeline_generate_tess_state()
4527 ls_hs_config); in radv_pipeline_generate_tess_state()
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