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Searched refs:lvl1_state (Results 1 – 7 of 7) sorted by relevance

/external/arm-trusted-firmware/plat/qti/common/src/
Dqti_pm.c32 #define qti_make_pwrstate_lvl1(lvl1_state, lvl0_state, type) \ argument
33 (((lvl1_state) << QTI_LOCAL_PSTATE_WIDTH) | \
37 #define qti_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, type) \ argument
39 qti_make_pwrstate_lvl1(lvl1_state, lvl0_state, type))
42 #define qti_make_pwrstate_lvl3(lvl3_state, lvl2_state, lvl1_state, lvl0_state, type) \ argument
44 qti_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, type))
/external/arm-trusted-firmware/plat/mediatek/mt8173/include/
Dmt8173_def.h129 #define mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
130 (((lvl1_state) << MTK_LOCAL_PSTATE_WIDTH) | \
135 lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
137 mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
/external/arm-trusted-firmware/include/plat/arm/common/
Dplat_arm.h131 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
132 (((lvl1_state) << ARM_LOCAL_PSTATE_WIDTH) | \
136 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
138 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
/external/arm-trusted-firmware/plat/qemu/common/
Dqemu_pm.c39 #define qemu_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
40 (((lvl1_state) << PLAT_LOCAL_PSTATE_WIDTH) | \
/external/arm-trusted-firmware/plat/qemu/qemu_sbsa/
Dsbsa_pm.c47 #define qemu_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
48 (((lvl1_state) << PLAT_LOCAL_PSTATE_WIDTH) | \
/external/arm-trusted-firmware/plat/mediatek/mt8183/
Dplat_pm.c66 #define mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
67 (((lvl1_state) << MTK_LOCAL_PSTATE_WIDTH) | \
72 lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
74 mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
/external/arm-trusted-firmware/plat/rpi/common/
Drpi3_pm.c40 #define rpi3_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
41 (((lvl1_state) << PLAT_LOCAL_PSTATE_WIDTH) | \