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Searched refs:lwc1 (Results 1 – 25 of 158) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Mips/msa/
Dmsa-nooddspreg.ll17 ; CHECK-NOT: lwc1 $f{{[13579]+}}
18 ; CHECK: lwc1 $f{{[02468]+}}
25 ; CHECK-NOT: lwc1 $f{{[13579]+}}
26 ; CHECK: lwc1 $f{{[02468]+}}
44 ; CHECK-NOT: lwc1 $f{{[13579]+}}
45 ; CHECK: lwc1 $f{{[02468]+}}
48 ; CHECK-NOT: lwc1 $f{{[13579]+}}
49 ; CHECK: lwc1 $f{{[02468]+}}
/external/llvm-project/llvm/test/CodeGen/Mips/
D2009-11-16-CstPoolLoad.ll11 ; PIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
13 ; STATIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
15 ; PIC-N32: lwc1 $f0, %got_ofst(.LCPI0_0)($[[R0]])
17 ; STATIC-N32: lwc1 $f0, %lo(.LCPI0_0)($[[R0]])
19 ; PIC-N64: lwc1 $f0, %got_ofst(.LCPI0_0)($[[R0]])
21 ; STATIC-N64: lwc1 $f0, %lo(.LCPI0_0)($[[R0]])
Dfastcc.ll177 ; CHECK: lwc1 $f19
178 ; CHECK: lwc1 $f18
179 ; CHECK: lwc1 $f17
180 ; CHECK: lwc1 $f16
181 ; CHECK: lwc1 $f15
182 ; CHECK: lwc1 $f14
183 ; CHECK: lwc1 $f13
184 ; CHECK: lwc1 $f12
185 ; CHECK: lwc1 $f11
186 ; CHECK: lwc1 $f10
[all …]
Do32_cc.ll20 ; ALL-DAG: lwc1 $f12, %lo
21 ; ALL-DAG: lwc1 $f14, %lo
32 ; ALL-DAG: lwc1 $f12, %lo
45 ; ALL-DAG: lwc1 $f14, %lo
97 ; ALL-DAG: lwc1 $f12, %lo
175 ; ALL-DAG: lwc1 $f12, %lo
176 ; ALL-DAG: lwc1 $f14, %lo
189 ; ALL-DAG: lwc1 $f12, %lo
205 ; ALL-DAG: lwc1 $f14, %lo
217 ; ALL-DAG: lwc1 $f12, %lo
[all …]
Dfp-indexed-ls.ll28 ; MIPS32R1: lwc1 $f0, 0($[[T3]])
35 ; MIPS32R6: lwc1 $f0, 0($[[T3]])
44 ; MIPS64R6: lwc1 $f0, 0($[[T3]])
112 ; MIPS32R1-DAG: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
116 ; MIPS32R2: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
119 ; MIPS32R6-DAG: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
123 ; MIPS4: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
126 ; MIPS64R6-DAG: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
Dreturn-vector.ll62 ; CHECK: lwc1 $[[R0:[a-z0-9]+]], 28($sp)
63 ; CHECK: lwc1 $[[R1:[a-z0-9]+]], 24($sp)
64 ; CHECK: lwc1 $[[R3:[a-z0-9]+]], 20($sp)
65 ; CHECK: lwc1 $[[R4:[a-z0-9]+]], 16($sp)
132 ; CHECK-DAG: lwc1 $f[[F0:[0-9]]], [[O0]]($sp)
133 ; CHECK-DAG: lwc1 $f[[F1:[0-9]]], 20($sp)
186 ; CHECK-DAG: lwc1 $f[[R0:[0-9]+]], 16($sp)
Dmips64fpldst.ll15 ; CHECK-N64: lwc1 $f{{[0-9]+}}, 0($[[R0]])
18 ; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]])
/external/llvm/test/CodeGen/Mips/
D2009-11-16-CstPoolLoad.ll11 ; PIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
13 ; STATIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
15 ; PIC-N32: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
17 ; STATIC-N32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
19 ; PIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
21 ; STATIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
Dfastcc.ll178 ; CHECK: lwc1 $f19
179 ; CHECK: lwc1 $f18
180 ; CHECK: lwc1 $f17
181 ; CHECK: lwc1 $f16
182 ; CHECK: lwc1 $f15
183 ; CHECK: lwc1 $f14
184 ; CHECK: lwc1 $f13
185 ; CHECK: lwc1 $f12
186 ; CHECK: lwc1 $f11
187 ; CHECK: lwc1 $f10
[all …]
Do32_cc.ll20 ; ALL-DAG: lwc1 $f12, %lo
21 ; ALL-DAG: lwc1 $f14, %lo
32 ; ALL-DAG: lwc1 $f12, %lo
45 ; ALL-DAG: lwc1 $f14, %lo
97 ; ALL-DAG: lwc1 $f12, %lo
175 ; ALL-DAG: lwc1 $f12, %lo
176 ; ALL-DAG: lwc1 $f14, %lo
189 ; ALL-DAG: lwc1 $f12, %lo
205 ; ALL-DAG: lwc1 $f14, %lo
217 ; ALL-DAG: lwc1 $f12, %lo
[all …]
Dfp-indexed-ls.ll28 ; MIPS32R1: lwc1 $f0, 0($[[T3]])
35 ; MIPS32R6: lwc1 $f0, 0($[[T3]])
44 ; MIPS64R6: lwc1 $f0, 0($[[T3]])
112 ; MIPS32R1-DAG: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
116 ; MIPS32R2: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
119 ; MIPS32R6-DAG: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
123 ; MIPS4: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
126 ; MIPS64R6-DAG: lwc1 $[[T0:f0]], 0(${{[0-9]+}})
Dreturn-vector.ll62 ; CHECK: lwc1 $[[R0:[a-z0-9]+]], 28($sp)
63 ; CHECK: lwc1 $[[R1:[a-z0-9]+]], 24($sp)
64 ; CHECK: lwc1 $[[R3:[a-z0-9]+]], 20($sp)
65 ; CHECK: lwc1 $[[R4:[a-z0-9]+]], 16($sp)
131 ; CHECK-NOT: lwc1
182 ; CHECK-DAG: lwc1 $[[R0:[a-z0-9]+]], 16($sp)
Dmicromips-lwc1-swc1.ll20 ; MM32: lwc1 $f0, 0($[[R3]])
26 ; MM64: lwc1 $f0, 0($[[R3]])
Dmips64fpldst.ll17 ; CHECK-N64: lwc1 $f{{[0-9]+}}, 0($[[R0]])
20 ; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]])
Dno-odd-spreg.ll32 ; ODDSPREG-NOT: lwc1
37 ; NOODDSPREG: lwc1 $[[T1:f[0-9]*[02468]]],
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Dfpcmpa.ll21 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
22 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
42 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
43 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
62 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
63 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
83 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
84 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
103 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
104 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/Fast-ISel/
Dfpcmpa.ll21 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
22 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
42 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
43 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
62 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
63 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
83 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
84 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
103 ; CHECK-DAG: lwc1 $f[[REG_F2:[0-9]+]], 0($[[REG_F2_GOT]])
104 ; CHECK-DAG: lwc1 $f[[REG_F1:[0-9]+]], 0($[[REG_F1_GOT]])
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/
Dtest_TypeInfoforMF.ll18 ; MIPS32-NEXT: lwc1 $f0, 0($4)
44 ; MIPS32-NEXT: lwc1 $f0, 0($4)
45 ; MIPS32-NEXT: lwc1 $f1, 0($5)
75 ; MIPS32-NEXT: lwc1 $f1, 0($6)
106 ; MIPS32-NEXT: lwc1 $f1, 0($6)
Dload_4_unaligned.ll30 ; MIPS32R6-NEXT: lwc1 $f0, 0($1)
53 ; MIPS32R6-NEXT: lwc1 $f0, 0($1)
65 ; MIPS32-NEXT: lwc1 $f0, 0($1)
73 ; MIPS32R6-NEXT: lwc1 $f0, 0($1)
85 ; MIPS32-NEXT: lwc1 $f0, 0($1)
93 ; MIPS32R6-NEXT: lwc1 $f0, 0($1)
Daggregate_struct_return.ll7 ; MIPS32-NEXT: lwc1 $f0, 0($4)
8 ; MIPS32-NEXT: lwc1 $f1, 4($4)
9 ; MIPS32-NEXT: lwc1 $f3, 0($5)
10 ; MIPS32-NEXT: lwc1 $f2, 4($5)
/external/llvm/test/CodeGen/Mips/cconv/
Dreturn-hard-float.ll33 ; O32-DAG: lwc1 $f0, %lo(float)([[R1]])
35 ; N32-DAG: lwc1 $f0, %lo(float)([[R1]])
37 ; N64-DAG: lwc1 $f0, 0([[R1]])
Darguments-hard-float.ll134 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 16($sp)
137 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 20($sp)
140 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 24($sp)
143 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 28($sp)
148 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 32($sp)
150 ; NEW-DAG: lwc1 [[F1:\$f[0-9]+]], 0($sp)
/external/llvm-project/llvm/test/CodeGen/Mips/cconv/
Dreturn-hard-float.ll43 ; O32-DAG: lwc1 $f0, %lo(float)([[R1]])
45 ; N32-DAG: lwc1 $f0, %lo(float)([[R1]])
46 ; N64-DAG: lwc1 $f0, %lo(float)([[R1:\$[0-9+]]])
Darguments-hard-float.ll136 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 16($sp)
139 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 20($sp)
142 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 24($sp)
145 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 28($sp)
150 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 32($sp)
152 ; NEW-DAG: lwc1 [[F1:\$f[0-9]+]], 0($sp)
/external/llvm-project/llvm/test/MC/Mips/
Dmacro-li.s.s72 # ALL: lwc1 $f4, %lo([[LABEL]])($1) # encoding: [A,A,0x24,0xc4]
102 # ALL: lwc1 $f4, %lo([[LABEL]])($1) # encoding: [A,A,0x24,0xc4]
124 # ALL: lwc1 $f4, %lo([[LABEL]])($1) # encoding: [A,A,0x24,0xc4]
147 # ALL: lwc1 $f4, %lo([[LABEL]])($1) # encoding: [A,A,0x24,0xc4]
173 # ALL: lwc1 $f4, %lo([[LABEL]])($1) # encoding: [A,A,0x24,0xc4]
195 # ALL: lwc1 $f4, %lo([[LABEL]])($1) # encoding: [A,A,0x24,0xc4]

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