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/external/llvm-project/llvm/test/MC/Mips/eva/
Dvalid_R6.s25lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf]
26lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f]
27lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
Dvalid_preR6.s29lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf]
30lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f]
31lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
Dinvalid.s16 lwe $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid register number
17 lwe $4, 8($33) # CHECK: :[[@LINE]]:15: error: invalid register number
18 lwe $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
19 lwe $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
Dinvalid_R6.s25 lwe $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid register number
26 lwe $4, 8($33) # CHECK: :[[@LINE]]:25: error: invalid register number
27lwe $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs…
28lwe $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs…
Dinvalid-noeva-wrong-error.s40lwe $15,255($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
41lwe $13,-256($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
42lwe $15,-200($a1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
/external/llvm/test/MC/Mips/eva/
Dvalid_R6.s25lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf]
26lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f]
27lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
Dvalid_preR6.s29lwe $15,255($a2) # CHECK: lwe $15, 255($6) # encoding: [0x7c,0xcf,0x7f,0xaf]
30lwe $13,-256($a2) # CHECK: lwe $13, -256($6) # encoding: [0x7c,0xcd,0x80,0x2f]
31lwe $15,-200($a1) # CHECK: lwe $15, -200($5) # encoding: [0x7c,0xaf,0x9c,0x2f]
Dinvalid.s16 lwe $33, 8($5) # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
17 lwe $4, 8($33) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
18 lwe $4, 512($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
19 lwe $4, -513($5) # CHECK: :[[@LINE]]:13: error: expected memory with 9-bit signed offset
Dinvalid_R6.s25 lwe $33, 8($5) # CHECK: :[[@LINE]]:19: error: invalid operand for instruction
26lwe $4, 8($33) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs…
27lwe $4, 512($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs…
28lwe $4, -513($5) # CHECK: :[[@LINE]]:23: error: expected memory with 9-bit signed offs…
Dinvalid-noeva-wrong-error.s40lwe $15,255($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
41lwe $13,-256($a2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
42lwe $15,-200($a1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
/external/llvm-project/llvm/test/MC/AMDGPU/
Dmimg.s39 image_load v[5:6], v[1:4], s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16
72 image_store v5, v[1:4], s[8:15] dmask:0x1 unorm glc slc r128 lwe da d16
257 image_load_mip_pck v[5:6], v[1:4], s[8:15] dmask:0x1 unorm glc slc tfe lwe da
266 image_load_pck_sgn v5, v[1:4], s[8:15] dmask:0x1 lwe
291 image_store_mip_pck v1, v[2:5], s[12:19] dmask:0x1 unorm glc slc lwe da
418 image_atomic_add v9, v5, s[8:15] dmask:0x1 unorm glc slc lwe da
422 image_atomic_add v10, v6, s[8:15] dmask:0x1 lwe
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DMIMGInstructions.td229 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
231 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
241 SLC:$slc, R128A16:$r128, TFE:$tfe, LWE:$lwe),
243 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe"
254 SLC:$slc, R128A16:$r128, TFE:$tfe, LWE:$lwe),
256 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe"
322 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
324 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
334 GLC:$glc, SLC:$slc, R128A16:$r128, TFE:$tfe, LWE:$lwe),
336 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe"
[all …]
/external/llvm-project/llvm/lib/Target/AMDGPU/
DMIMGInstructions.td245 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
247 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
257 SLC:$slc, R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe),
259 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$a16$tfe$lwe"
270 SLC:$slc, R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe),
272 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$a16$tfe$lwe"
338 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
340 let AsmString = asm#" $vdata, $vaddr, $srsrc$dmask$unorm$glc$slc$r128$tfe$lwe$da"
350 … GLC:$glc, SLC:$slc, R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe),
352 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$a16$tfe$lwe"
[all …]
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips32r6-eva.s28 # CHECK-EL: lwe $4, 8($2) # encoding: [0x82,0x60,0x08,0x6e]
55 # CHECK-EB: lwe $4, 8($2) # encoding: [0x60,0x82,0x6e,0x08]
72 lwe $4, 8($2)
Dmicromips-eva.s36 # CHECK-EL: lwe $4, 8($2) # encoding: [0x82,0x60,0x08,0x6e]
71 # CHECK-EB: lwe $4, 8($2) # encoding: [0x60,0x82,0x6e,0x08]
92 lwe $4, 8($2)
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst251 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
252 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
253 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
254 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
255 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
256 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
257 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
258 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
259 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
260 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
[all …]
DAMDGPUAsmGFX8.rst250 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
251 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
252 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
253 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
254 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
255 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
256 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
257 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
258 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
259 …id_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>` …
[all …]
DAMDGPUAsmGFX10.rst560 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
561 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
562 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
563 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
564 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
565 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
566 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
567 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
568 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
569 …_synid_dlc>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lwe<amdgpu_synid_lwe>`
[all …]
DAMDGPUAsmGFX9.rst338 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
339 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
340 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
341 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
342 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
343 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
344 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
345 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
346 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
347 …ynid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` …
[all …]
/external/llvm/test/MC/Mips/
Dmicromips-loadstore-instructions.s51 # CHECK-EL: lwe $4, 8($2) # encoding: [0x82,0x60,0x08,0x6e]
97 # CHECK-EB: lwe $4, 8($2) # encoding: [0x60,0x82,0x6e,0x08]
140 lwe $4, 8($2)
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dmimg_vi.txt35 # VI: image_load v5, v1, s[8:15] dmask:0x1 unorm glc slc r128 tfe lwe da d16 ; encoding: [0x00,0xf1…
96 # VI: image_load_pck_sgn v5, v1, s[8:15] dmask:0x1 lwe ; encoding: [0x00,0x01,0x0e,0xf0,0x01,0x05,0…
102 # VI: image_store_mip_pck v1, v2, s[12:19] dmask:0x1 unorm glc slc lwe da ; encoding: [0x00,0x71,0x…
149 # VI: image_atomic_add v5, v1, s[8:15] dmask:0x1 unorm lwe ; encoding: [0x00,0x11,0x4a,0xf0,0x01,0x…
203 # GFX80: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc lwe da d16 ; encod…
204 # GFX81: image_gather4 v[252:253], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc lwe da d16 ; encod…
215 # VI: image_gather4 v[252:255], v1, s[8:15], s[12:15] dmask:0x1 unorm glc slc tfe lwe da ; encoding…
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dinvalid.s70 lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid register number
71 lwe $4, 8($33) # CHECK: :[[@LINE]]:13: error: invalid register number
72 lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
73 lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
/external/llvm/test/MC/Mips/micromips/
Dinvalid.s70 lwe $33, 8($5) # CHECK: :[[@LINE]]:7: error: invalid operand for instruction
71 lwe $4, 8($33) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
72 lwe $4, 512($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
73 lwe $4, -513($5) # CHECK: :[[@LINE]]:11: error: expected memory with 9-bit signed offset
/external/icu/icu4c/source/data/lang/
Dzu.txt835 BALANKA{"Ulwimi lwe-Balank lwe-Anii"}
836 BARLA{"Iqembu lolwomi lwesi-Barlavento lwe-Kabuverdianu"}
840 BISKE{"Ulwimi lwe-San Giorgio/Bila"}
841 BOHORIC{"Uhlambu lwe-Bohorič"}
845 COLB1945{"Ubhalomagama lwe-Portuguese-Brazilian lwango-1945"}
848 DAJNKO{"Uhlamvu lwe-Dajnko"}
876 METELKO{"Uhlambu lwe-Metelko"}
908 SOTAV{"Iqembu lolwimi lwesi-Sotavento lwe-Kabuverdianu"}
916 UNIFON{"Uhlamvu lwefonotiki lwe-Unifon"}
/external/llvm/lib/Target/AMDGPU/
DSIIntrinsics.td68 llvm_i32_ty], // lwe(imm)
83 llvm_i32_ty], // lwe(imm)

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