/external/llvm/test/MC/Mips/eva/ |
D | valid_preR6.s | 32 … lwle $s6,255($15) # CHECK: lwle $22, 255($15) # encoding: [0x7d,0xf6,0x7f,0x99] 33 … lwle $s7,-256($10) # CHECK: lwle $23, -256($10) # encoding: [0x7d,0x57,0x80,0x19] 34 … lwle $s7,-176($13) # CHECK: lwle $23, -176($13) # encoding: [0x7d,0xb7,0xa8,0x19]
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D | invalid_R6.s | 9 …lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig… 10 …lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig… 11 …lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
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D | invalid-noeva-wrong-error.s | 43 …lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s… 44 …lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s… 45 …lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
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/external/llvm-project/llvm/test/MC/Mips/eva/ |
D | valid_preR6.s | 32 … lwle $s6,255($15) # CHECK: lwle $22, 255($15) # encoding: [0x7d,0xf6,0x7f,0x99] 33 … lwle $s7,-256($10) # CHECK: lwle $23, -256($10) # encoding: [0x7d,0x57,0x80,0x19] 34 … lwle $s7,-176($13) # CHECK: lwle $23, -176($13) # encoding: [0x7d,0xb7,0xa8,0x19]
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D | invalid_R6.s | 9 …lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 10 …lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction 11 …lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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D | invalid-noeva-wrong-error.s | 43 …lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct… 44 …lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct… 45 …lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
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/external/llvm-project/llvm/test/MC/Mips/ |
D | micromips-eva.s | 26 # CHECK-EL: lwle $24, 2($4) # encoding: [0x04,0x63,0x02,0x64] 61 # CHECK-EB: lwle $24, 2($4) # encoding: [0x63,0x04,0x64,0x02] 87 lwle $24, 2($4)
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/external/llvm/test/MC/Mips/ |
D | micromips-control-instructions.s | 48 # CHECK-EL: lwle $24, 2($4) # encoding: [0x04,0x63,0x02,0x64] 90 # CHECK-EB: lwle $24, 2($4) # encoding: [0x63,0x04,0x64,0x02] 127 lwle $24, 2($4)
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/external/llvm-project/llvm/test/MC/Disassembler/Mips/eva/ |
D | valid_preR6-eva.txt | 26 0x7d 0xf6 0x7f 0x99 # CHECK: lwle $22, 255($15) 27 0x7d 0x57 0x80 0x19 # CHECK: lwle $23, -256($10) 28 0x7d 0xb7 0xa8 0x19 # CHECK: lwle $23, -176($13)
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/external/llvm/test/MC/Disassembler/Mips/eva/ |
D | valid_preR6-eva.txt | 26 0x7d 0xf6 0x7f 0x99 # CHECK: lwle $22, 255($15) 27 0x7d 0x57 0x80 0x19 # CHECK: lwle $23, -256($10) 28 0x7d 0xb7 0xa8 0x19 # CHECK: lwle $23, -176($13)
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/external/llvm/test/MC/Mips/mips64r6/ |
D | invalid-mips1-wrong-error.s | 14 …lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
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D | invalid-mips3-wrong-error.s | 20 …lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
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/external/llvm-project/llvm/test/MC/Mips/mips64r6/ |
D | invalid-mips1-wrong-error.s | 14 …lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
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D | invalid-mips3-wrong-error.s | 20 …lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
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/external/llvm-project/llvm/test/MC/Mips/mips32r6/ |
D | invalid-mips1-wrong-error.s | 14 …lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
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/external/llvm/test/MC/Mips/mips32r6/ |
D | invalid-mips1-wrong-error.s | 14 …lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
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/external/llvm-project/llvm/test/CodeGen/Mips/ |
D | unaligned-memops-mapping.mir | 121 # CHECK: 14: 60 24 64 00 lwle $1, 0($4)
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/external/llvm/lib/Target/Mips/ |
D | MipsEVAInstrInfo.td | 101 class LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>;
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/external/llvm-project/llvm/lib/Target/Mips/ |
D | MipsEVAInstrInfo.td | 105 class LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsEVAInstrInfo.td | 105 class LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>;
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/external/llvm-project/llvm/test/MC/Mips/micromips/ |
D | valid.s | 299 lwle $24, 2($4) # CHECK: lwle $24, 2($4) # encoding: [0x63,0x04,0x64,0x02] label
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/external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
D | valid-el.txt | 187 0x04 0x63 0x02 0x64 # CHECK: lwle $24, 2($4)
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D | valid.txt | 187 0x63 0x04 0x64 0x02 # CHECK: lwle $24, 2($4)
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/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
D | valid-el.txt | 205 0x04 0x63 0x02 0x64 # CHECK: lwle $24, 2($4)
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D | valid.txt | 205 0x63 0x04 0x64 0x02 # CHECK: lwle $24, 2($4)
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