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Searched refs:lwle (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/test/MC/Mips/eva/
Dvalid_preR6.s32lwle $s6,255($15) # CHECK: lwle $22, 255($15) # encoding: [0x7d,0xf6,0x7f,0x99]
33lwle $s7,-256($10) # CHECK: lwle $23, -256($10) # encoding: [0x7d,0x57,0x80,0x19]
34lwle $s7,-176($13) # CHECK: lwle $23, -176($13) # encoding: [0x7d,0xb7,0xa8,0x19]
Dinvalid_R6.s9lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
10lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
11lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
Dinvalid-noeva-wrong-error.s43lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
44lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
45lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
/external/llvm-project/llvm/test/MC/Mips/eva/
Dvalid_preR6.s32lwle $s6,255($15) # CHECK: lwle $22, 255($15) # encoding: [0x7d,0xf6,0x7f,0x99]
33lwle $s7,-256($10) # CHECK: lwle $23, -256($10) # encoding: [0x7d,0x57,0x80,0x19]
34lwle $s7,-176($13) # CHECK: lwle $23, -176($13) # encoding: [0x7d,0xb7,0xa8,0x19]
Dinvalid_R6.s9lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dinvalid-noeva-wrong-error.s43lwle $s6,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
44lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
45lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips-eva.s26 # CHECK-EL: lwle $24, 2($4) # encoding: [0x04,0x63,0x02,0x64]
61 # CHECK-EB: lwle $24, 2($4) # encoding: [0x63,0x04,0x64,0x02]
87 lwle $24, 2($4)
/external/llvm/test/MC/Mips/
Dmicromips-control-instructions.s48 # CHECK-EL: lwle $24, 2($4) # encoding: [0x04,0x63,0x02,0x64]
90 # CHECK-EB: lwle $24, 2($4) # encoding: [0x63,0x04,0x64,0x02]
127 lwle $24, 2($4)
/external/llvm-project/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_preR6-eva.txt26 0x7d 0xf6 0x7f 0x99 # CHECK: lwle $22, 255($15)
27 0x7d 0x57 0x80 0x19 # CHECK: lwle $23, -256($10)
28 0x7d 0xb7 0xa8 0x19 # CHECK: lwle $23, -176($13)
/external/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_preR6-eva.txt26 0x7d 0xf6 0x7f 0x99 # CHECK: lwle $22, 255($15)
27 0x7d 0x57 0x80 0x19 # CHECK: lwle $23, -256($10)
28 0x7d 0xb7 0xa8 0x19 # CHECK: lwle $23, -176($13)
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips1-wrong-error.s14lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
Dinvalid-mips3-wrong-error.s20lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
/external/llvm-project/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips1-wrong-error.s14lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
Dinvalid-mips3-wrong-error.s20lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
/external/llvm-project/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1-wrong-error.s14lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1-wrong-error.s14lwle $s4,-4231($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
/external/llvm-project/llvm/test/CodeGen/Mips/
Dunaligned-memops-mapping.mir121 # CHECK: 14: 60 24 64 00 lwle $1, 0($4)
/external/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td101 class LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>;
/external/llvm-project/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td105 class LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td105 class LWLE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwle", GPR32Opnd, II_LWLE>;
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dvalid.s299 lwle $24, 2($4) # CHECK: lwle $24, 2($4) # encoding: [0x63,0x04,0x64,0x02] label
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt187 0x04 0x63 0x02 0x64 # CHECK: lwle $24, 2($4)
Dvalid.txt187 0x63 0x04 0x64 0x02 # CHECK: lwle $24, 2($4)
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt205 0x04 0x63 0x02 0x64 # CHECK: lwle $24, 2($4)
Dvalid.txt205 0x63 0x04 0x64 0x02 # CHECK: lwle $24, 2($4)

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