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/external/llvm-project/llvm/test/CodeGen/PowerPC/
D2008-10-28-f128-i32.ll16 ; CHECK-NEXT: lwz 4, 380(1)
19 ; CHECK-NEXT: lwz 4, 376(1)
24 ; CHECK-NEXT: lwz 4, 388(1)
26 ; CHECK-NEXT: lwz 3, 384(1)
46 ; CHECK-NEXT: lwz 3, 308(1)
49 ; CHECK-NEXT: lwz 3, 304(1)
52 ; CHECK-NEXT: lwz 3, 300(1)
55 ; CHECK-NEXT: lwz 3, 296(1)
71 ; CHECK-NEXT: lwz 3, 284(1)
74 ; CHECK-NEXT: lwz 3, 280(1)
[all …]
Dfminnum.ll24 ; CHECK-NEXT: lwz 0, 20(1)
41 ; CHECK-NEXT: lwz 0, 20(1)
58 ; CHECK-NEXT: lwz 3, 44(1)
61 ; CHECK-NEXT: lwz 3, 40(1)
64 ; CHECK-NEXT: lwz 3, 36(1)
67 ; CHECK-NEXT: lwz 3, 32(1)
70 ; CHECK-NEXT: lwz 3, 76(1)
73 ; CHECK-NEXT: lwz 3, 72(1)
75 ; CHECK-NEXT: lwz 3, 68(1)
78 ; CHECK-NEXT: lwz 3, 64(1)
[all …]
Daix-cc-ext-vec-abi.ll52 ; ASM32-DAG: lwz [[REG1:[0-9]+]], L..C0(2)
54 ; ASM32-DAG: lwz [[REG2:[0-9]+]], L..C1(2)
56 ; ASM32-DAG: lwz [[REG3:[0-9]+]], L..C2(2)
58 ; ASM32-DAG: lwz [[REG4:[0-9]+]], L..C3(2)
60 ; ASM32-DAG: lwz [[REG5:[0-9]+]], L..C4(2)
62 ; ASM32-DAG: lwz [[REG6:[0-9]+]], L..C5(2)
64 ; ASM32-DAG: lwz [[REG7:[0-9]+]], L..C6(2)
66 ; ASM32-DAG: lwz [[REG8:[0-9]+]], L..C7(2)
68 ; ASM32-DAG: lwz [[REG9:[0-9]+]], L..C8(2)
70 ; ASM32-DAG: lwz [[REG10:[0-9]+]], L..C9(2)
[all …]
Dlower-globaladdr32-aix-asm.ll16 ; SMALL: lwz [[REG1:[0-9]+]], L..C0(2)
17 ; SMALL: lwz [[REG2:[0-9]+]], 0([[REG1]])
22 ; LARGE: lwz [[REG2:[0-9]+]], L..C0@l([[REG1]])
23 ; LARGE: lwz [[REG3:[0-9]+]], 0([[REG2]])
34 ; SMALL: lwz [[REG1:[0-9]+]], L..C1(2)
40 ; LARGE: lwz [[REG2:[0-9]+]], L..C1@l([[REG1]])
Dumulo-128-legalisation-lowering.ll123 ; PPC32-NEXT: lwz 12, 28(1)
138 ; PPC32-NEXT: lwz 30, 72(1) # 4-byte Folded Reload
139 ; PPC32-NEXT: lwz 29, 68(1) # 4-byte Folded Reload
140 ; PPC32-NEXT: lwz 28, 64(1) # 4-byte Folded Reload
141 ; PPC32-NEXT: lwz 27, 60(1) # 4-byte Folded Reload
142 ; PPC32-NEXT: lwz 26, 56(1) # 4-byte Folded Reload
143 ; PPC32-NEXT: lwz 25, 52(1) # 4-byte Folded Reload
144 ; PPC32-NEXT: lwz 24, 48(1) # 4-byte Folded Reload
145 ; PPC32-NEXT: lwz 23, 44(1) # 4-byte Folded Reload
146 ; PPC32-NEXT: lwz 22, 40(1) # 4-byte Folded Reload
[all …]
Dvec_splat.ll52 ; G3-NEXT: lwz 6, 12(4)
53 ; G3-NEXT: lwz 7, 8(4)
54 ; G3-NEXT: lwz 8, 4(4)
56 ; G3-NEXT: lwz 4, 0(4)
91 ; G3-NEXT: lwz 5, 12(4)
92 ; G3-NEXT: lwz 6, 8(4)
93 ; G3-NEXT: lwz 7, 4(4)
95 ; G3-NEXT: lwz 4, 0(4)
121 ; G3-NEXT: lwz 5, 8(4)
122 ; G3-NEXT: lwz 6, 0(4)
[all …]
Dsave-bp.ll22 ; PPC32: lwz 31, 0(1)
24 ; PPC32: lwz 0, -4(31)
25 ; PPC32: lwz 30, -8(31)
38 ; PPC32PIC: lwz 31, 0(1)
40 ; PPC32PIC: lwz 0, -4(31)
41 ; PPC32PIC: lwz 29, -12(31)
/external/libffi/src/powerpc/
Dsysv.S74 lwz %r3,-24-(8*4)(%r28)
75 lwz %r4,-24-(7*4)(%r28)
76 lwz %r5,-24-(6*4)(%r28)
77 lwz %r6,-24-(5*4)(%r28)
80 lwz %r7,-24-(4*4)(%r28)
81 lwz %r8,-24-(3*4)(%r28)
82 lwz %r9,-24-(2*4)(%r28)
83 lwz %r10,-24-(1*4)(%r28)
103 lwz %r11, -20(%r28)
124 lwz %r9, 4(%r28)
[all …]
Dppc_closure.S56 lwz %r3,FFI_TRAMPOLINE_SIZE(%r11)
58 lwz %r4,FFI_TRAMPOLINE_SIZE+4(%r11)
60 lwz %r5,FFI_TRAMPOLINE_SIZE+8(%r11)
107 lwz %r0,148(%r1)
126 lwz %r3,112+0(%r1)
220 lwz %r3,112+0(%r1)
228 lwz %r3,112+0(%r1)
236 lwz %r3,112+0(%r1)
237 lwz %r4,112+4(%r1)
242 lwz %r3,112+0(%r1)
[all …]
Daix.S247 lwz r0, 0(r29)
248 lwz r2, 4(r29)
249 lwz r11, 8(r29)
255 lwz r3, 20+(1*4)(r1)
256 lwz r4, 20+(2*4)(r1)
257 lwz r5, 20+(3*4)(r1)
258 lwz r6, 20+(4*4)(r1)
260 lwz r7, 20+(5*4)(r1)
261 lwz r8, 20+(6*4)(r1)
262 lwz r9, 20+(7*4)(r1)
[all …]
/external/libffi/src/or1k/
Dsysv.S68 l.lwz r3, 0(r1)
69 l.lwz r4, 4(r1)
70 l.lwz r5, 8(r1)
71 l.lwz r6, 12(r1)
72 l.lwz r7, 16(r1)
73 l.lwz r8, 20(r1)
98 l.lwz r9, -4(r1)
99 l.lwz r1, -8(r1)
100 l.lwz r14, -12(r1)
101 l.lwz r16, -16(r1)
[all …]
/external/llvm/test/MC/PowerPC/
Dppc64-operands.s67 # CHECK-BE: lwz 1, 0(0) # encoding: [0x80,0x20,0x00,0x00]
68 # CHECK-LE: lwz 1, 0(0) # encoding: [0x00,0x00,0x20,0x80]
69 lwz 1, 0(0)
71 # CHECK-BE: lwz 1, 0(0) # encoding: [0x80,0x20,0x00,0x00]
72 # CHECK-LE: lwz 1, 0(0) # encoding: [0x00,0x00,0x20,0x80]
73 lwz 1, 0(%r0)
75 # CHECK-BE: lwz 1, 0(31) # encoding: [0x80,0x3f,0x00,0x00]
76 # CHECK-LE: lwz 1, 0(31) # encoding: [0x00,0x00,0x3f,0x80]
77 lwz 1, 0(31)
79 # CHECK-BE: lwz 1, 0(31) # encoding: [0x80,0x3f,0x00,0x00]
[all …]
Dppc64-errors.s58 # CHECK-NEXT: lwz 1, 0(32)
59 lwz 1, 0(32)
62 # CHECK-NEXT: lwz 1, 0(%r32)
63 lwz 1, 0(%r32)
66 # CHECK-NEXT: lwz 1, -32769(2)
67 lwz 1, -32769(2)
70 # CHECK-NEXT: lwz 1, 32768(2)
71 lwz 1, 32768(2)
/external/llvm-project/llvm/test/MC/PowerPC/
Dppc64-operands.s67 # CHECK-BE: lwz 1, 0(0) # encoding: [0x80,0x20,0x00,0x00]
68 # CHECK-LE: lwz 1, 0(0) # encoding: [0x00,0x00,0x20,0x80]
69 lwz 1, 0(0)
71 # CHECK-BE: lwz 1, 0(0) # encoding: [0x80,0x20,0x00,0x00]
72 # CHECK-LE: lwz 1, 0(0) # encoding: [0x00,0x00,0x20,0x80]
73 lwz 1, 0(%r0)
75 # CHECK-BE: lwz 1, 0(31) # encoding: [0x80,0x3f,0x00,0x00]
76 # CHECK-LE: lwz 1, 0(31) # encoding: [0x00,0x00,0x3f,0x80]
77 lwz 1, 0(31)
79 # CHECK-BE: lwz 1, 0(31) # encoding: [0x80,0x3f,0x00,0x00]
[all …]
Dppc64-errors.s96 # CHECK-NEXT: lwz 1, 0(32)
97 lwz 1, 0(32)
100 # CHECK-NEXT: lwz 1, 0(%r32)
101 lwz 1, 0(%r32)
104 # CHECK-NEXT: lwz 1, -32769(2)
105 lwz 1, -32769(2)
108 # CHECK-NEXT: lwz 1, 32768(2)
109 lwz 1, 32768(2)
/external/python/cpython2/Modules/_ctypes/libffi/src/powerpc/
Dsysv.S73 lwz %r3,-16-(8*4)(%r28)
74 lwz %r4,-16-(7*4)(%r28)
75 lwz %r5,-16-(6*4)(%r28)
76 lwz %r6,-16-(5*4)(%r28)
79 lwz %r7,-16-(4*4)(%r28)
80 lwz %r8,-16-(3*4)(%r28)
81 lwz %r9,-16-(2*4)(%r28)
82 lwz %r10,-16-(1*4)(%r28)
122 lwz %r9, 4(%r28)
123 lwz %r31, -4(%r28)
[all …]
Dppc_closure.S100 lwz %r0,148(%r1)
118 lwz %r3,112+0(%r1)
202 lwz %r3,112+0(%r1)
208 lwz %r3,112+0(%r1)
214 lwz %r3,112+0(%r1)
215 lwz %r4,112+4(%r1)
220 lwz %r3,112+0(%r1)
221 lwz %r4,112+4(%r1)
232 lwz %r3,112+0(%r1)
238 lwz %r3,112+0(%r1)
[all …]
Daix.S235 lwz r0, 0(r29)
236 lwz r2, 4(r29)
237 lwz r11, 8(r29)
243 lwz r3, 20+(1*4)(r1)
244 lwz r4, 20+(2*4)(r1)
245 lwz r5, 20+(3*4)(r1)
246 lwz r6, 20+(4*4)(r1)
248 lwz r7, 20+(5*4)(r1)
249 lwz r8, 20+(6*4)(r1)
250 lwz r9, 20+(7*4)(r1)
[all …]
/external/capstone/suite/MC/PowerPC/
Dppc64-operands.s.cs14 0x80,0x20,0x00,0x00 = lwz 1, 0(0)
15 0x80,0x20,0x00,0x00 = lwz 1, 0(0)
16 0x80,0x3f,0x00,0x00 = lwz 1, 0(31)
17 0x80,0x3f,0x00,0x00 = lwz 1, 0(31)
18 0x80,0x22,0x80,0x00 = lwz 1, -32768(2)
19 0x80,0x22,0x7f,0xff = lwz 1, 32767(2)
/external/llvm-project/lld/test/ELF/
Dppc32-tls-gd.s35 # GD-NEXT: lwz 3, 0(3)
40 # GD-NEXT: lwz 3, 0(3)
45 # GD-NEXT: lwz 3, 0(3)
52 # LE-NEXT: lwz 3, 0(3)
56 # LE-NEXT: lwz 3, 0(3)
60 # LE-NEXT: lwz 3, 0(3)
71 # IE-NEXT: lwz 3, 0(3)
73 # IE-NEXT: lwz 3, 0(31)
75 # IE-NEXT: lwz 3, 0(3)
77 # IE-NEXT: lwz 3, 4(9)
[all …]
Dppc64-tls-pcrel-le.s28 # CHECK-NEXT: lwz 3, 0(3)
30 # CHECK-NEXT: lwz 3, 0(3)
32 # CHECK-NEXT: lwz 3, 0(3)
43 lwz 3, 0(3)
45 lwz 3, 0(3)
47 lwz 3, 0(3)
/external/llvm-project/libunwind/src/
DUnwindRegistersRestore.S770 l.lwz r0, 0(r3)
771 l.lwz r1, 4(r3)
772 l.lwz r2, 8(r3)
774 l.lwz r4, 16(r3)
775 l.lwz r5, 20(r3)
776 l.lwz r6, 24(r3)
777 l.lwz r7, 28(r3)
778 l.lwz r8, 32(r3)
780 l.lwz r10, 40(r3)
781 l.lwz r11, 44(r3)
[all …]
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-operands.txt39 # CHECK: lwz 1, 0(0)
42 # CHECK: lwz 1, 0(0)
45 # CHECK: lwz 1, 0(31)
48 # CHECK: lwz 1, 0(31)
51 # CHECK: lwz 1, -32768(2)
54 # CHECK: lwz 1, 32767(2)
/external/llvm-project/llvm/test/MC/Disassembler/PowerPC/
Dppc64-operands.txt39 # CHECK: lwz 1, 0(0)
42 # CHECK: lwz 1, 0(0)
45 # CHECK: lwz 1, 0(31)
48 # CHECK: lwz 1, 0(31)
51 # CHECK: lwz 1, -32768(2)
54 # CHECK: lwz 1, 32767(2)
/external/llvm/test/CodeGen/PowerPC/
Danon_aggr.ll37 ; DARWIN32: lwz r3, -[[OFFSET1]]
38 ; DARWIN32: lwz r3, -[[OFFSET2]]
74 ; DARWIN32: lwz r[[REG2:[0-9]+]], 44(r[[REGSP]])
80 ; DARWIN32: lwz r3, -[[OFFSET1]]
81 ; DARWIN32: lwz r3, -[[OFFSET2]]
120 ; DARWIN32: lwz r[[REG3:[0-9]+]], 44(r[[REGSP]])
121 ; DARWIN32: lwz r[[REG4:[0-9]+]], 32(r[[REGSP]])
125 ; DARWIN32: lwz r3, -[[OFFSET2]]
126 ; DARWIN32: lwz r3, -[[OFFSET1]]
163 ; DARWIN32: lwz r[[REG4:[0-9]+]], 96(r1)
[all …]

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