| /external/libaom/libaom/aom_dsp/x86/ |
| D | quantize_ssse3_x86_64.asm | 37 pcmpeqw m5, m5
38 psrlw m5, 15
39 paddw m0, m5
40 paddw m1, m5
51 pxor m5, m5 ; m5 = dedicated zero
79 pmullw m5, m8, m4 ; store the lower 16 bits of m8*qsh
84 psrlw m5, 15
85 por m8, m5
89 pmullw m5, m13, m4 ; store the lower 16 bits of m13*qsh
94 psrlw m5, 15
[all …]
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| D | highbd_sad_sse2.asm | 77 mova m5, [srcq]
78 psubusw m5, m1
80 por m1, m5
81 mova m5, [srcq+16]
82 psubusw m5, m2
84 por m2, m5
85 mova m5, [srcq+32]
86 psubusw m5, m3
88 por m3, m5
89 mova m5, [srcq+48]
[all …]
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| D | fwd_txfm_ssse3_x86_64.asm | 64 mova m5, [inputq + r3]
75 psllw m5, 2
87 paddw m7, m2, m5
88 psubw m2, m5
94 paddw m5, m9, m7
104 paddw m6, m4, m5
105 psubw m4, m5
113 pmaddwd m5, m2, [GLOBAL(pw_15137_6270)]
117 paddd m5, m8
121 psrad m5, 14
[all …]
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| D | subpel_variance_sse2.asm | 69 pcmpgtw m5, m6 ; mask for 0 > x
71 punpcklwd m4, m6, m5
72 punpckhwd m6, m5 ; sign-extend m6 word->dword
89 pcmpgtw m5, m6 ; mask for 0 > x
91 punpcklwd m6, m5 ; sign-extend m6 word->dword
401 punpckhbw m2, m0, m5
402 punpckhbw m3, m4, m5
403 punpcklbw m0, m5
404 punpcklbw m4, m5
425 punpckhbw m2, m0, m5
[all …]
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| D | aom_subpixel_8t_ssse3.asm | 120 movu m5, [srcq + sstrideq - 3]
123 punpckhbw m3, m5, m5
124 punpcklbw m5, m5
129 palignr m2, m3, m5, 1
131 palignr m3, m5, 5
135 punpckhqdq m5, m1, m3
138 paddsw m1, m5
141 movd m5, [dstq + dstrideq]
149 movu m5, [srcq + sstrideq]
150 punpckldq m4, m5 ; Bytes 0,1,2,3 from row 0, then 0,1,2,3 from row 2
[all …]
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| D | quantize_avx_x86_64.asm | 53 pxor m5, m5 ; m5 = dedicated zero
114 pcmpgtw m6, m5, m8
119 pcmpgtw m6, m5, m13
130 pcmpgtw m6, m5, m8
135 pcmpgtw m6, m5, m13
144 pcmpeqw m8, m8, m5 ; m8 = c[i] == 0
145 pcmpeqw m13, m13, m5 ; m13 = c[i] == 0
201 pxor m5, m5 ; m5 = dedicated zero
256 pmullw m5, m8, m4 ; store the lower 16 bits of m8*qsh
261 psrlw m5, 15
[all …]
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| D | highbd_subpel_variance_impl_sse2.asm | 231 movu m5, [srcq+src_strideq*2+16]
235 pavgw m1, m5
250 movu m5, [srcq+src_strideq*4]
254 pavgw m1, m5
307 movu m5, [srcq+src_strideq*2+16]
316 pmullw m5, filter_y_b
321 paddw m1, m5
339 movu m5, [srcq+src_strideq*4]
344 pmullw m5, filter_y_b
349 paddw m1, m5
[all …]
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| /external/libvpx/libvpx/vpx_dsp/x86/ |
| D | highbd_sad_sse2.asm | 74 mova m5, [srcq]
75 psubusw m5, m1
77 por m1, m5
78 mova m5, [srcq+16]
79 psubusw m5, m2
81 por m2, m5
82 mova m5, [srcq+32]
83 psubusw m5, m3
85 por m3, m5
86 mova m5, [srcq+48]
[all …]
|
| D | fwd_txfm_ssse3_x86_64.asm | 46 mova m5, [inputq + r3]
57 psllw m5, 2
69 paddw m7, m2, m5
70 psubw m2, m5
76 paddw m5, m9, m7
86 paddw m6, m4, m5
87 psubw m4, m5
95 pmaddwd m5, m2, [GLOBAL(pw_15137_6270)]
99 paddd m5, m8
103 psrad m5, 14
[all …]
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| D | subpel_variance_sse2.asm | 66 pcmpgtw m5, m6 ; mask for 0 > x
68 punpcklwd m4, m6, m5
69 punpckhwd m6, m5 ; sign-extend m6 word->dword
86 pcmpgtw m5, m6 ; mask for 0 > x
88 punpcklwd m6, m5 ; sign-extend m6 word->dword
398 punpckhbw m2, m0, m5
399 punpckhbw m3, m4, m5
400 punpcklbw m0, m5
401 punpcklbw m4, m5
422 punpckhbw m2, m0, m5
[all …]
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| D | sad4d_sse2.asm | 22 movd m5, [ref4q+%3]
32 punpckldq m5, m3
35 movlhps m7, m5
40 movd m5, [ref1q+%5]
43 punpckldq m1, m5
46 movd m5, [ref3q+%5]
47 punpckldq m3, m5
49 movd m5, [ref4q+%5]
50 punpckldq m4, m5
51 movd m5, [srcq +%4]
[all …]
|
| D | highbd_subpel_variance_impl_sse2.asm | 228 movu m5, [srcq+src_strideq*2+16]
232 pavgw m1, m5
247 movu m5, [srcq+src_strideq*4]
251 pavgw m1, m5
304 movu m5, [srcq+src_strideq*2+16]
313 pmullw m5, filter_y_b
318 paddw m1, m5
336 movu m5, [srcq+src_strideq*4]
341 pmullw m5, filter_y_b
346 paddw m1, m5
[all …]
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| D | vpx_subpixel_8t_ssse3.asm | 116 movu m5, [srcq + sstrideq - 3]
119 punpckhbw m3, m5, m5
120 punpcklbw m5, m5
125 palignr m2, m3, m5, 1
127 palignr m3, m5, 5
131 punpckhqdq m5, m1, m3
134 paddsw m1, m5
137 movd m5, [dstq + dstrideq]
147 pavgb m1, m5
202 palignr m5, m1, m0, 13
[all …]
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| D | highbd_intrapred_sse2.asm | 133 mova m5, [leftq+32]
136 paddw m5, m6
138 paddw m2, m5
275 pshuflw m5, m1, 0x55
276 movlhps m2, m5 ; l1 l1 l1 l1 l2 l2 l2 l2
286 pshuflw m5, m1, 0xff
287 movlhps m2, m5
352 pcmpeqw m5, m5
354 pxor m3, m5 ; max possible value
361 pshuflw m5, m7, 0x0
[all …]
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| /external/python/cpython3/Modules/_blake2/impl/ |
| D | blake2b-load-sse41.h | 36 b0 = _mm_unpacklo_epi64(m4, m5); \
44 b0 = _mm_unpackhi_epi64(m4, m5); \
60 b0 = _mm_unpacklo_epi64(m5, m4); \
69 b1 = _mm_unpackhi_epi64(m5, m2); \
84 b0 = _mm_alignr_epi8(m6, m5, 8); \
100 b0 = _mm_blend_epi16(m5, m1, 0xF0); \
117 b1 = _mm_unpackhi_epi64(m6, m5); \
140 b0 = _mm_unpacklo_epi64(m3, m5); \
149 b1 = _mm_unpacklo_epi64(m1, m5); \
164 b0 = _mm_blend_epi16(m7, m5, 0xF0); \
[all …]
|
| D | blake2s-load-sse2.h | 18 #define LOAD_MSG_0_2(buf) buf = _mm_set_epi32(m7,m5,m3,m1)
23 #define LOAD_MSG_1_3(buf) buf = _mm_set_epi32(m5,m11,m0,m1)
25 #define LOAD_MSG_2_1(buf) buf = _mm_set_epi32(m15,m5,m12,m11)
31 #define LOAD_MSG_3_3(buf) buf = _mm_set_epi32(m15,m4,m5,m2)
33 #define LOAD_MSG_4_1(buf) buf = _mm_set_epi32(m10,m2,m5,m9)
40 #define LOAD_MSG_5_4(buf) buf = _mm_set_epi32(m9,m14,m5,m13)
42 #define LOAD_MSG_6_2(buf) buf = _mm_set_epi32(m10,m13,m15,m5)
47 #define LOAD_MSG_7_3(buf) buf = _mm_set_epi32(m2,m8,m15,m5)
52 #define LOAD_MSG_8_4(buf) buf = _mm_set_epi32(m5,m4,m7,m2)
54 #define LOAD_MSG_9_2(buf) buf = _mm_set_epi32(m5,m6,m4,m2)
|
| /external/libvpx/libvpx/vp9/encoder/x86/ |
| D | vp9_error_sse2.asm | 25 pxor m5, m5 ; dedicated zero register
46 punpckldq m7, m0, m5
47 punpckhdq m0, m5
49 punpckldq m7, m2, m5
51 punpckhdq m2, m5
57 movhlps m5, m4
59 paddq m4, m5
66 pshufd m5, m4, 0x1
69 movd edx, m5
81 pxor m5, m5 ; dedicated zero register
[all …]
|
| /external/mesa3d/src/intel/tools/tests/gen5/ |
| D | mov.asm | 3 mov.sat(8) m5<1>F g4<4>F { align16 };
26 mov(8) m5<1>UD 0D { align1 };
33 mov(8) m5<1>.wD 0D { align16 NoDDChk };
35 mov(8) m5<1>.wD g8<4>.wD { align16 NoDDChk };
39 mov(8) m5<1>F 0x28000030VF /* [1F, 0F, 0F, 0.75F]VF */ { align16 };
42 mov(8) m5<1>.xF g1<0>.xD { align16 NoDDClr };
43 mov(8) m5<1>.yF g3<4>.xD { align16 NoDDClr,NoDDChk };
44 mov(8) m5<1>.wF g3<4>.xD { align16 NoDDChk };
59 mov.sat(8) m5<1>.wF g20<4>.wF { align16 NoDDChk };
68 mov.sat(8) m5<1>.zF 0x3eaaaaabF /* 0.333333F */ { align16 };
[all …]
|
| /external/mesa3d/src/intel/tools/tests/gen4/ |
| D | add.asm | 10 add(8) m5<1>.xyzF g10<4>.xyzzF g8<4>.xyzzF { align16 NoDDClr };
21 add(8) m5<1>.xF g3<4>.xF 0x3f000000F /* 0.5F */ { align16 };
23 add.sat(8) m5<1>F g7<4>F g8<4>F { align16 };
25 add.sat(8) m5<1>.xyzF g25<4>.xyzzF g26<4>.xyzzF { align16 NoDDClr };
30 add(8) m5<1>.xyzF g4<4>.xyzzF g2<0>.xyzzF { align16 };
32 add(8) m5<1>.zwF g8<4>.xxxyF g9<4>.xxxyF { align16 NoDDChk };
34 add.sat(8) m5<1>.yF g1<0>.zF 0x3f000000F /* 0.5F */ { align16 };
38 add.sat(8) m5<1>.yF g6<4>.xF g7<4>.xF { align16 NoDDClr,NoDDChk };
39 add.sat(8) m5<1>.wF g6<4>.xF g7<4>.xF { align16 NoDDChk };
41 add.sat(8) m5<1>.yF -g1<0>.xF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
[all …]
|
| D | mov.asm | 5 mov.sat(8) m5<1>F g4<4>F { align16 };
33 mov(8) m5<1>.xF g3<4>.xD { align16 NoDDClr };
34 mov(8) m5<1>.yzwD 0D { align16 NoDDChk };
37 mov(8) m5<1>.wD g8<4>.wD { align16 NoDDChk };
53 mov(8) m5<1>.yF g3<4>.xD { align16 NoDDClr,NoDDChk };
54 mov(8) m5<1>.wF g3<4>.xD { align16 NoDDChk };
72 mov.sat(8) m5<1>.wF g20<4>.wF { align16 NoDDChk };
75 mov(8) m5<1>F g3<4>D { align16 };
77 mov.sat(8) m5<1>.zF 0x3eaaaaabF /* 0.333333F */ { align16 };
78 mov.sat(8) m5<1>.wF 0x3dcccccdF /* 0.1F */ { align16 NoDDClr };
[all …]
|
| D | mul.asm | 8 mul(8) m5<1>.xyF g3<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
12 mul(8) m5<1>F g3<4>F 0x3f000000F /* 0.5F */ { align16 };
21 mul.sat(8) m5<1>F g6<4>F 0x3b800000F /* 0.00390625F */ { align16 };
22 mul.sat(8) m5<1>.xyzF g3<4>.xyzzF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
24 mul.sat(8) m5<1>F g3<4>F g3<4>F { align16 };
31 mul.sat(8) m5<1>F g4<4>F 0x20303030VF /* [1F, 1F, 1F, 0.5F]VF */ { align16 };
32 mul(8) m5<1>F g3<4>F 0x20305454VF /* [5F, 5F, 1F, 0.5F]VF */ { align16 };
34 mul(8) m5<1>.xyzF g3<4>.xyzzF 0x30302020VF /* [0.5F, 0.5F, 1F, 1F]VF */ { align16…
35 mul(8) m5<1>.zF g3<4>.zF 0x3f000000F /* 0.5F */ { align16 NoDDClr,NoDDChk };
36 mul(8) m5<1>F g3<4>F g1<0>.xF { align16 };
[all …]
|
| /external/mesa3d/src/intel/tools/tests/gen4.5/ |
| D | add.asm | 11 add(8) m5<1>.xyzF g10<4>.xyzzF g8<4>.xyzzF { align16 NoDDClr };
23 add(8) m5<1>.xF g3<4>.xF 0x3f000000F /* 0.5F */ { align16 };
25 add.sat(8) m5<1>F g7<4>F g8<4>F { align16 };
27 add.sat(8) m5<1>.xyzF g25<4>.xyzzF g26<4>.xyzzF { align16 NoDDClr };
32 add(8) m5<1>.xyzF g4<4>.xyzzF g2<0>.xyzzF { align16 };
34 add(8) m5<1>.zwF g8<4>.xxxyF g9<4>.xxxyF { align16 NoDDChk };
36 add.sat(8) m5<1>.yF g1<0>.zF 0x3f000000F /* 0.5F */ { align16 };
39 add.sat(8) m5<1>.yF g6<4>.xF g7<4>.xF { align16 NoDDClr,NoDDChk };
40 add.sat(8) m5<1>.wF g6<4>.xF g7<4>.xF { align16 NoDDChk };
42 add.sat(8) m5<1>.yF -g1<0>.xF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
[all …]
|
| D | mov.asm | 3 mov.sat(8) m5<1>F g4<4>F { align16 };
29 mov(8) m5<1>.xF g3<4>.xD { align16 NoDDClr };
30 mov(8) m5<1>.yzwD 0D { align16 NoDDChk };
35 mov(8) m5<1>.wD g8<4>.wD { align16 NoDDChk };
51 mov(8) m5<1>.yF g3<4>.xD { align16 NoDDClr,NoDDChk };
52 mov(8) m5<1>.wF g3<4>.xD { align16 NoDDChk };
70 mov.sat(8) m5<1>.wF g20<4>.wF { align16 NoDDChk };
73 mov(8) m5<1>F g3<4>D { align16 };
75 mov.sat(8) m5<1>.zF 0x3eaaaaabF /* 0.333333F */ { align16 };
76 mov.sat(8) m5<1>.wF 0x3dcccccdF /* 0.1F */ { align16 NoDDClr };
[all …]
|
| D | mul.asm | 9 mul(8) m5<1>.xyF g3<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
13 mul(8) m5<1>F g3<4>F 0x3f000000F /* 0.5F */ { align16 };
21 mul.sat(8) m5<1>F g6<4>F 0x3b800000F /* 0.00390625F */ { align16 };
22 mul.sat(8) m5<1>.xyzF g3<4>.xyzzF 0x3f000000F /* 0.5F */ { align16 NoDDClr };
27 mul(8) m5<1>.xyF g3<4>.xyyyF 0x3f000000F /* 0.5F */ { align16 NoDDChk };
31 mul.sat(8) m5<1>.xyF g1<0>.wzzzF g3<4>.wzzzF { align16 };
32 mul.sat(8) m5<1>F g4<4>F 0x20303030VF /* [1F, 1F, 1F, 0.5F]VF */ { align16 };
33 mul(8) m5<1>F g3<4>F 0x20305454VF /* [5F, 5F, 1F, 0.5F]VF */ { align16 };
35 mul(8) m5<1>.xyzF g3<4>.xyzzF 0x30302020VF /* [0.5F, 0.5F, 1F, 1F]VF */ { align16…
36 mul(8) m5<1>.zF g3<4>.zF 0x3f000000F /* 0.5F */ { align16 NoDDClr,NoDDChk };
[all …]
|
| /external/libaom/libaom/av1/encoder/x86/ |
| D | error_sse2.asm | 42 pxor m5, m5 ; dedicated zero register
63 punpckldq m7, m0, m5
64 punpckhdq m0, m5
66 punpckldq m7, m2, m5
68 punpckhdq m2, m5
74 movhlps m5, m4
76 paddq m4, m5
83 pshufd m5, m4, 0x1
86 movd edx, m5
|