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Searched refs:mask16 (Results 1 – 6 of 6) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/
Dtail-pred-basic.ll393 %active.lane.mask16 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %v8, i32 %N)
400 …v4i32.p0v4i32(<4 x i32>* nonnull %lsr.iv3840, i32 4, <4 x i1> %active.lane.mask16, <4 x i32> undef)
407 …v4i32.p0v4i32(<4 x i32>* nonnull %lsr.iv3133, i32 4, <4 x i1> %active.lane.mask16, <4 x i32> undef)
418 …sked.store.v4i32.p0v4i32(<4 x i32> %v12, <4 x i32>* %lsr.iv26, i32 4, <4 x i1> %active.lane.mask16)
/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/
Dstate.h258 simd16scalari mask16; // IN: Active mask for shader (16-wide) member
Dfrontend.cpp1942 vsContext_lo.mask16 = GenerateMask16(endVertex - i); in ProcessDraw()
/external/llvm/test/CodeGen/X86/
Davx512-mask-op.ll5 define i16 @mask16(i16 %x) {
6 ; CHECK-LABEL: mask16:
/external/llvm-project/llvm/test/CodeGen/X86/
Davx512-mask-op.ll9 define i16 @mask16(i16 %x) {
10 ; CHECK-LABEL: mask16:
17 ; X86-LABEL: mask16:
/external/neon_2_sse/
DNEON_2_SSE.h10118 …_NEON2SSE_ALIGN_16 static const int8_t mask16[16] = {0,1, 6,7, 12,13, 2,3, 8,9, 14,15, 4,5, 10,11}; variable
10122 tmp0 = _mm_shuffle_epi8(val0, *(__m128i*)mask16); //a0, a3, b2,a1, b0, b3, a2, b1