| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_shader.c | 83 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint()
86 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint()
100 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint()
103 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint()
114 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint()
117 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint()
624 so->info.max_reg + 1, in ir3_shader_disasm()
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| D | ir3.c | 119 info->max_reg = MAX2(info->max_reg, max >> 3); in reg()
124 info->max_reg = MAX2(info->max_reg, max >> 2); in reg()
928 info->max_reg = -1; in ir3_assemble()
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| D | ir3_shader.h | 985 return (2 * (v->info.max_reg + 1)) + (v->info.max_half_reg + 1); in ir3_shader_halfregs()
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| D | ir3.h | 57 int8_t max_reg; /* highest GPR # used by shader */ member
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_fs_bank_conflicts.cpp | 367 max_reg(n), in partitioning()
378 max_reg(p.max_reg), in partitioning()
380 atoms(new unsigned[p.max_reg + num_terminator_atoms]) in partitioning()
385 sizeof(unsigned) * (p.max_reg + num_terminator_atoms)); in partitioning()
397 SWAP(max_reg, p.max_reg); in operator =()
416 for (unsigned reg1 = reg + 1; reg1 <= max_reg; reg1++) { in require_contiguous()
463 return atoms[max_reg]; in num_atoms()
473 unsigned max_reg; member
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_program.c | 251 fs_gprs = (fpi->max_reg < 0) ? 0x80 : fpi->max_reg; in fd2_program_emit()
255 vs_gprs = (vpi->max_reg < 0) ? 0x80 : vpi->max_reg; in fd2_program_emit()
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| D | ir2_ra.c | 164 ctx->info->max_reg = MAX2(ctx->info->max_reg, (int) idx); in ra_reg()
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| D | ir2.h | 57 int8_t max_reg; member
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| D | ir2.c | 445 ctx.info->max_reg = -1; in ir2_compile()
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| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_program.c | 179 fssz = (s[FS].i->max_reg >= 24) ? TWO_QUADS : FOUR_QUADS; in fd4_program_emit()
285 A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) | in fd4_program_emit()
360 A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) | in fd4_program_emit()
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| /external/mesa3d/docs/relnotes/ |
| D | 9.2.4.rst | 66 - freedreno/a3xx/compiler: use max_reg rather than file_count
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_program.c | 235 A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(vsi->max_reg + 1) | in fd3_program_emit()
304 A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(fsi->max_reg + 1) | in fd3_program_emit()
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| /external/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_program.c | 471 A6XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(vs->info.max_reg + 1) | in setup_stateobj()
591 A6XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT(hs->info.max_reg + 1) | in setup_stateobj()
603 A6XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT(ds->info.max_reg + 1) | in setup_stateobj()
720 A6XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(fs->info.max_reg + 1) | in setup_stateobj()
794 A6XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT(gs->info.max_reg + 1) | in setup_stateobj()
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| D | fd6_compute.c | 107 A6XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(i->max_reg + 1) | in cs_program_emit()
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| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_program.c | 297 fssz = (s[FS].i->max_reg >= 24) ? TWO_QUADS : FOUR_QUADS; in fd5_program_emit()
409 A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(s[VS].i->max_reg + 1) | in fd5_program_emit()
529 A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(s[FS].i->max_reg + 1) | in fd5_program_emit()
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| D | fd5_compute.c | 107 A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(i->max_reg + 1) | in cs_program_emit()
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| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_gallium.c | 66 v->info.max_reg + 1, in dump_shader_info()
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| /external/mesa3d/src/freedreno/computerator/ |
| D | a6xx.c | 147 A6XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(i->max_reg + 1) | in cs_program_emit()
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| /external/mesa3d/src/freedreno/vulkan/ |
| D | tu_clear_blit.c | 361 .info.max_reg = 1, in r3d_common()
390 .info.max_reg = MAX2(num_rts, 1) - 1, in r3d_common()
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| D | tu_pipeline.c | 403 A6XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(xs->info.max_reg + 1) | in tu6_emit_xs_config()
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