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Searched refs:maxa (Results 1 – 25 of 32) sorted by relevance

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/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s79 maxa.s $f5, $f4, $f3 # CHECK: maxa.s $f5, $f4, $f3 # encoding: [0x54,0x64,0x28,0x2b]
80 maxa.d $f5, $f4, $f3 # CHECK: maxa.d $f5, $f4, $f3 # encoding: [0x54,0x64,0x2a,0x2b]
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s159 maxa.s $f5, $f4, $f3 # CHECK: maxa.s $f5, $f4, $f3 # encoding: [0x54,0x64,0x28,0x2b]
160 maxa.d $f5, $f4, $f3 # CHECK: maxa.d $f5, $f4, $f3 # encoding: [0x54,0x64,0x2a,0x2b]
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt119 0x1f 0x10 0x04 0x46 # CHECK: maxa.s $f0, $f2, $f4
120 0x1f 0x10 0x24 0x46 # CHECK: maxa.d $f0, $f2, $f4
Dvalid-mips32r6.txt91 0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4
102 0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4
/external/llvm-project/llvm/test/MC/Mips/micromips32r6/
Dvalid.s203 maxa.s $f5, $f4, $f3 # CHECK: maxa.s $f5, $f4, $f3 # encoding: [0x54,0x64,0x28,0x2b]
204 maxa.d $f5, $f4, $f3 # CHECK: maxa.d $f5, $f4, $f3 # encoding: [0x54,0x64,0x2a,0x2b]
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt123 0x1f 0x10 0x04 0x46 # CHECK: maxa.s $f0, $f2, $f4
124 0x1f 0x10 0x24 0x46 # CHECK: maxa.d $f0, $f2, $f4
Dvalid-mips32r6.txt97 0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4
108 0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt139 0x1f 0x10 0x24 0x46 # CHECK: maxa.d $f0, $f2, $f4
140 0x1f 0x10 0x04 0x46 # CHECK: maxa.s $f0, $f2, $f4
Dvalid-mips64r6.txt110 0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4
121 0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4
/external/llvm-project/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt145 0x1f 0x10 0x24 0x46 # CHECK: maxa.d $f0, $f2, $f4
146 0x1f 0x10 0x04 0x46 # CHECK: maxa.s $f0, $f2, $f4
Dvalid-mips64r6.txt116 0x46 0x04 0x10 0x1f # CHECK: maxa.s $f0, $f2, $f4
127 0x46 0x24 0x10 0x1f # CHECK: maxa.d $f0, $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt66 0x54 0x64 0x28 0x2b # CHECK: maxa.s $f5, $f4, $f3
67 0x54 0x64 0x2a 0x2b # CHECK: maxa.d $f5, $f4, $f3
/external/llvm-project/llvm/test/MC/Mips/
Dtarget-soft-float.s141 maxa.d $f2, $f2, $f2
143 maxa.s $f2, $f2, $f2
/external/llvm/test/MC/Mips/
Dtarget-soft-float.s141 maxa.d $f2, $f2, $f2
143 maxa.s $f2, $f2, $f2
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt145 0x54 0x64 0x28 0x2b # CHECK: maxa.s $f5, $f4, $f3
146 0x54 0x64 0x2a 0x2b # CHECK: maxa.d $f5, $f4, $f3
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt141 0x54 0x64 0x28 0x2b # CHECK: maxa.s $f5, $f4, $f3
142 0x54 0x64 0x2a 0x2b # CHECK: maxa.d $f5, $f4, $f3
/external/mesa3d/src/gallium/drivers/softpipe/
Dsp_setup.c527 float maxa = v[2] * setup->vmax[0][3]; in tri_persp_coeff() local
529 float majda = maxa - mina; in tri_persp_coeff()
/external/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td312 class MAXA_S_MMR6_ENC : POOL32F_MINMAX_FM<"maxa.s", 0, 0b000101011>;
313 class MAXA_D_MMR6_ENC : POOL32F_MINMAX_FM<"maxa.d", 1, 0b000101011>;
874 class MAXA_S_MMR6_DESC : MAX_MIN_DESC_BASE<"maxa.s", FGR32Opnd>, HARDFLOAT;
875 class MAXA_D_MMR6_DESC : MAX_MIN_DESC_BASE<"maxa.d", FGR64Opnd>, HARDFLOAT;
DMips32r6InstrInfo.td598 class MAXA_S_DESC : MAX_MIN_DESC_BASE<"maxa.s", FGR32Opnd>;
599 class MAXA_D_DESC : MAX_MIN_DESC_BASE<"maxa.d", FGR64Opnd>;
/external/llvm-project/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td252 class MAXA_S_MMR6_ENC : POOL32F_MINMAX_FM<"maxa.s", 0, 0b000101011>;
253 class MAXA_D_MMR6_ENC : POOL32F_MINMAX_FM<"maxa.d", 1, 0b000101011>;
908 class MAXA_S_MMR6_DESC : MAX_MIN_DESC_BASE<"maxa.s", FGR32Opnd, II_MAXA_S>,
910 class MAXA_D_MMR6_DESC : MAX_MIN_DESC_BASE<"maxa.d", FGR64Opnd, II_MAXA_D>,
DMips32r6InstrInfo.td666 class MAXA_S_DESC : MAX_MIN_DESC_BASE<"maxa.s", FGR32Opnd, II_MAX_S>;
667 class MAXA_D_DESC : MAX_MIN_DESC_BASE<"maxa.d", FGR64Opnd, II_MAX_D>;
DMipsScheduleGeneric.td900 // sel(eq|ne).[ds], max.[ds], maxa.[ds], min.[ds], mina.[ds], class.[ds]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td252 class MAXA_S_MMR6_ENC : POOL32F_MINMAX_FM<"maxa.s", 0, 0b000101011>;
253 class MAXA_D_MMR6_ENC : POOL32F_MINMAX_FM<"maxa.d", 1, 0b000101011>;
908 class MAXA_S_MMR6_DESC : MAX_MIN_DESC_BASE<"maxa.s", FGR32Opnd, II_MAXA_S>,
910 class MAXA_D_MMR6_DESC : MAX_MIN_DESC_BASE<"maxa.d", FGR64Opnd, II_MAXA_D>,
DMips32r6InstrInfo.td666 class MAXA_S_DESC : MAX_MIN_DESC_BASE<"maxa.s", FGR32Opnd, II_MAX_S>;
667 class MAXA_D_DESC : MAX_MIN_DESC_BASE<"maxa.d", FGR64Opnd, II_MAX_D>;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc5040 ".w\006maxa.d\006maxa.s\010maxi_s.b\010maxi_s.d\010maxi_s.h\010maxi_s.w\010"
6976 …{ 5968 /* maxa.d */, Mips::MAXA_D, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, AMFBS_…
6977 …{ 5968 /* maxa.d */, Mips::MAXA_D_MMR6, Convert__FGR64AsmReg1_0__FGR64AsmReg1_1__FGR64AsmReg1_2, A…
6978 …{ 5975 /* maxa.s */, Mips::MAXA_S, Convert__FGR32AsmReg1_0__FGR32AsmReg1_1__FGR32AsmReg1_2, AMFBS_…
6979 …{ 5975 /* maxa.s */, Mips::MAXA_S_MMR6, Convert__FGR32AsmReg1_0__FGR32AsmReg1_1__FGR32AsmReg1_2, A…
10339 …{ 5968 /* maxa.d */, 7 /* 0, 1, 2 */, MCK_FGR64AsmReg, AMFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_…
10340 …{ 5968 /* maxa.d */, 7 /* 0, 1, 2 */, MCK_FGR64AsmReg, AMFBS_InMicroMips_HasMips32r6_IsNotSoftFloa…
10341 …{ 5975 /* maxa.s */, 7 /* 0, 1, 2 */, MCK_FGR32AsmReg, AMFBS_HasStdEnc_HasMips32r6_IsNotSoftFloat_…
10342 …{ 5975 /* maxa.s */, 7 /* 0, 1, 2 */, MCK_FGR32AsmReg, AMFBS_InMicroMips_HasMips32r6_IsNotSoftFloa…

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