/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonPatternsV65.td | 10 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 19 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 28 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 41 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 50 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 59 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in
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D | HexagonHazardRecognizer.cpp | 103 if (UsesLoad && SU->isInstr() && SU->getInstr()->mayLoad()) in ShouldPreferAnother() 155 UsesLoad = MI->mayLoad(); in EmitInstruction() 157 if (TII->isHVXVec(*MI) && !MI->mayLoad() && !MI->mayStore()) in EmitInstruction()
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D | HexagonOptAddrMode.cpp | 129 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(MI)) in INITIALIZE_PASS_DEPENDENCY() 195 if ((!UseMID.mayLoad() && !UseMID.mayStore()) || in canRemoveAddasl() 358 if ((!MID.mayLoad() && !MID.mayStore()) || in processAddUses() 363 MachineOperand BaseOp = MID.mayLoad() ? MI->getOperand(1) in processAddUses() 369 MachineOperand OffsetOp = MID.mayLoad() ? MI->getOperand(2) in processAddUses() 418 MachineOperand &BaseOp = MID.mayLoad() ? UseMI->getOperand(1) in updateAddUses() 420 MachineOperand &OffsetOp = MID.mayLoad() ? UseMI->getOperand(2) in updateAddUses() 445 if ((MID.mayLoad() || MID.mayStore())) { in analyzeUses() 640 if (UseMID.mayLoad()) { in changeAddAsl() 674 if (MID.mayLoad()) in xformUseMI()
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonPatternsV65.td | 10 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 19 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 28 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 41 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 50 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 59 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in
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D | HexagonHazardRecognizer.cpp | 103 if (UsesLoad && SU->isInstr() && SU->getInstr()->mayLoad()) in ShouldPreferAnother() 155 UsesLoad = MI->mayLoad(); in EmitInstruction() 157 if (TII->isHVXVec(*MI) && !MI->mayLoad() && !MI->mayStore()) in EmitInstruction()
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D | HexagonOptAddrMode.cpp | 129 if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(MI)) in INITIALIZE_PASS_DEPENDENCY() 195 if ((!UseMID.mayLoad() && !UseMID.mayStore()) || in canRemoveAddasl() 358 if ((!MID.mayLoad() && !MID.mayStore()) || in processAddUses() 363 MachineOperand BaseOp = MID.mayLoad() ? MI->getOperand(1) in processAddUses() 369 MachineOperand OffsetOp = MID.mayLoad() ? MI->getOperand(2) in processAddUses() 418 MachineOperand &BaseOp = MID.mayLoad() ? UseMI->getOperand(1) in updateAddUses() 420 MachineOperand &OffsetOp = MID.mayLoad() ? UseMI->getOperand(2) in updateAddUses() 445 if ((MID.mayLoad() || MID.mayStore())) { in analyzeUses() 641 if (UseMID.mayLoad()) { in changeAddAsl() 675 if (MID.mayLoad()) in xformUseMI()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoC.td | 217 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 223 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in 229 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 235 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in 241 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 255 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 266 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 282 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, Uses = [X2] in 362 let rd = 0, imm = 0, hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 369 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in [all …]
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D | RISCVInstrInfo.td | 297 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 307 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 315 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in 321 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 327 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 334 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 339 let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in 344 let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in 350 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 357 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in [all …]
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D | RISCVInstrInfoA.td | 36 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 51 let hasSideEffects = 0, mayLoad = 1, mayStore = 1 in 187 let mayLoad = 1; 210 let mayLoad = 1; 221 let mayLoad = 1; 231 let mayLoad = 1; 277 let mayLoad = 1; 305 let mayLoad = 1;
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/external/llvm-project/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoC.td | 221 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 227 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in 233 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 239 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in 245 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 259 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 270 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 286 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, Uses = [X2] in 366 let rd = 0, imm = 0, hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 373 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in [all …]
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D | RISCVInstrInfo.td | 345 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 355 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 363 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in 369 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 375 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 382 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 388 hasSideEffects = 1, mayLoad = 0, mayStore = 0 in 394 hasSideEffects = 1, mayLoad = 0, mayStore = 0 in 400 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in 407 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in [all …]
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D | RISCVInstrInfoA.td | 36 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in 51 let hasSideEffects = 0, mayLoad = 1, mayStore = 1 in 187 let mayLoad = 1; 210 let mayLoad = 1; 221 let mayLoad = 1; 231 let mayLoad = 1; 277 let mayLoad = 1; 305 let mayLoad = 1;
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIPostRABundler.cpp | 72 if (!MI.mayLoad()) in isDependentLoad() 107 B->mayLoad() != I->mayLoad() || B->mayStore() != I->mayStore() || in runOnMachineFunction()
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D | SIMemoryLegalizer.cpp | 605 if (!(MI->mayLoad() && !MI->mayStore())) in getLoadInfo() 619 if (!(!MI->mayLoad() && MI->mayStore())) in getStoreInfo() 666 if (!(MI->mayLoad() && MI->mayStore())) in getAtomicCmpxchgOrRmwInfo() 696 assert(MI->mayLoad() && !MI->mayStore()); in enableLoadCacheBypass() 727 assert(MI->mayLoad() ^ MI->mayStore()); in enableNonTemporal() 942 assert(MI->mayLoad() && !MI->mayStore()); in enableLoadCacheBypass() 983 assert(MI->mayLoad() ^ MI->mayStore()); in enableNonTemporal() 1179 assert(MI->mayLoad() && !MI->mayStore()); in expandLoad() 1224 assert(!MI->mayLoad() && MI->mayStore()); in expandStore() 1292 assert(MI->mayLoad() && MI->mayStore()); in expandAtomicCmpxchgOrRmw()
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/external/llvm-project/llvm/tools/llvm-mca/Views/ |
D | InstructionInfoView.cpp | 66 TempStream << (IIVDEntry.mayLoad ? " * " : " "); in printView() 116 IIVDEntry.mayLoad = MCDesc.mayLoad(); in collectData()
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 42 let mayLoad = 1 in 68 let mayLoad = 1 in 100 let mayLoad = 1 in { 107 } // mayLoad = 1 118 let mayLoad = 1 in 128 let mayLoad = 1 in 174 let mayLoad = 1 in { 181 } // mayLoad = 1 189 let mayLoad = 1 in 196 let mayLoad = 1 in
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 42 let mayLoad = 1 in 68 let mayLoad = 1 in 100 let mayLoad = 1 in { 107 } // mayLoad = 1 118 let mayLoad = 1 in 128 let mayLoad = 1 in 174 let mayLoad = 1 in { 181 } // mayLoad = 1 189 let mayLoad = 1 in 196 let mayLoad = 1 in
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonIsetDx.td | 42 let Defs = [R31, R29, R30], Uses = [R30], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWordAc… 53 …= [R30, P0], isCodeGenOnly = 1, isPredicated = 1, isPredicatedFalse = 1, mayLoad = 1, accessSize =… 106 let isCodeGenOnly = 1, mayLoad = 1, accessSize = HalfWordAccess, hasNewValue = 1, opNewValue = 0 in 148 let isCodeGenOnly = 1, mayLoad = 1, accessSize = ByteAccess, hasNewValue = 1, opNewValue = 0 in 164 let isCodeGenOnly = 1, mayLoad = 1, accessSize = WordAccess, hasNewValue = 1, opNewValue = 0 in 211 let Defs = [PC, R31, R29, R30], Uses = [R30, P0], isCodeGenOnly = 1, isPredicated = 1, mayLoad = 1,… 303 let isCodeGenOnly = 1, mayLoad = 1, accessSize = HalfWordAccess, hasNewValue = 1, opNewValue = 0 in 422 let isCodeGenOnly = 1, mayLoad = 1, accessSize = ByteAccess, hasNewValue = 1, opNewValue = 0 in 452 let Uses = [R29], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWordAccess in 560 let Defs = [PC, R31, R29, R30], Uses = [R30], isCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWo… [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCMachineScheduler.cpp | 32 SecondCand.SU->getInstr()->mayLoad()) { in biasAddiLoadCandidate() 36 if (FirstCand.SU->getInstr()->mayLoad() && in biasAddiLoadCandidate()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZInstrSystem.td | 143 let mayLoad = 1, mayStore = 1, Defs = [CC] in { 188 let mayLoad = 1 in { 208 let mayLoad = 1, mayStore = 1, Defs = [CC] in 212 let mayLoad = 1, mayStore = 1, Defs = [CC] in { 218 let mayLoad = 1, mayStore = 1, Uses = [R0L, R1L] in { 224 let mayLoad = 1, mayStore = 1, Uses = [R0L] in 228 let mayLoad = 1, mayStore = 1, Uses = [R0L], Defs = [CC] in 300 let hasSideEffects = 1, mayLoad = 1, Uses = [R0L, R1D], Defs = [CC] in 363 let hasSideEffects = 1, mayLoad = 1, Defs = [R0D, R1D] in 392 let hasSideEffects = 1, mayLoad = 1 in { [all …]
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/external/llvm-project/llvm/lib/Target/SystemZ/ |
D | SystemZInstrSystem.td | 143 let mayLoad = 1, mayStore = 1, Defs = [CC] in { 188 let mayLoad = 1 in { 208 let mayLoad = 1, mayStore = 1, Defs = [CC] in 212 let mayLoad = 1, mayStore = 1, Defs = [CC] in { 218 let mayLoad = 1, mayStore = 1, Uses = [R0L, R1L] in { 224 let mayLoad = 1, mayStore = 1, Uses = [R0L] in 228 let mayLoad = 1, mayStore = 1, Uses = [R0L], Defs = [CC] in 300 let hasSideEffects = 1, mayLoad = 1, Uses = [R0L, R1D], Defs = [CC] in 363 let hasSideEffects = 1, mayLoad = 1, Defs = [R0D, R1D] in 392 let hasSideEffects = 1, mayLoad = 1 in { [all …]
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCMachineScheduler.cpp | 37 if (isADDIInstr(FirstCand) && SecondCand.SU->getInstr()->mayLoad()) { in biasAddiLoadCandidate() 41 if (FirstCand.SU->getInstr()->mayLoad() && isADDIInstr(SecondCand)) { in biasAddiLoadCandidate()
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/external/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 46 let mayLoad = 1 in 72 let mayLoad = 1 in 102 let mayLoad = 1 in 112 let mayLoad = 1 in 153 let mayLoad = 1 in 160 let mayLoad = 1 in
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIMemoryLegalizer.cpp | 579 if (!(MI->mayLoad() && !MI->mayStore())) in getLoadInfo() 593 if (!(!MI->mayLoad() && MI->mayStore())) in getStoreInfo() 640 if (!(MI->mayLoad() && MI->mayStore())) in getAtomicCmpxchgOrRmwInfo() 669 assert(MI->mayLoad() && !MI->mayStore()); in enableLoadCacheBypass() 703 assert(MI->mayLoad() ^ MI->mayStore()); in enableNonTemporal() 903 assert(MI->mayLoad() && !MI->mayStore()); in enableLoadCacheBypass() 944 assert(MI->mayLoad() ^ MI->mayStore()); in enableNonTemporal() 1137 assert(MI->mayLoad() && !MI->mayStore()); in expandLoad() 1182 assert(!MI->mayLoad() && MI->mayStore()); in expandStore() 1247 assert(MI->mayLoad() && MI->mayStore()); in expandAtomicCmpxchgOrRmw()
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 117 let mayLoad = 0; 284 let mayLoad = 0; 295 let mayLoad = 0; 308 let mayLoad = 0; 322 let mayLoad = 0; 334 let mayLoad = 0; 351 let mayLoad = 1; 658 let mayLoad = 1; 678 let mayLoad = 1;
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