Searched refs:memb (Results 1 – 25 of 97) sorted by relevance
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/external/llvm-project/lld/test/ELF/ |
D | hexagon.s | 55 if (p0) memb(r0+##_start)=r0.new } 56 # CHECK: 40a0c200 if (p0) memb(r0+##131648) = r0.new } 59 if (p0) r0=memb(r1+##_start) 60 # CHECK: 4101c000 if (p0) r0 = memb(r1+##131648) } 65 if (p0.new) memb(r0+##_start)=r0.new } 66 # CHECK: 42a0c200 if (p0.new) memb(r0+##131648) = r0.new } 70 if (P0.new) r0=memb(r0+##_start) } 71 # CHECK: 4300c000 if (p0.new) r0 = memb(r0+##131648) } 74 if (!p0) memb(r0+##_start)=r1 75 # CHECK: 4400c100 if (!p0) memb(r0+##131648) = r1 } [all …]
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/external/llvm-project/llvm/test/MC/Hexagon/ |
D | two-extenders.s | 9 if (p3) r23 = memb(##2164335510) 13 # CHECK: if (p3) r23 = memb(##2164335510) 19 if (p3.new) r23 = memb(##2164335510) 24 # CHECK: if (p3.new) r23 = memb(##2164335510) } 30 R2 = memb(gp+#0x1000) 31 # CHECK: { r2 = memb(gp+#4096) } 48 {R25 = #1; memb(gp+#0x1000) = R25.new} 50 # CHECK-NEXT: memb(gp+#4096) = r25.new } 63 memb(gp+#0x1000) = R2 64 # CHECK: { memb(gp+#4096) = r2 } [all …]
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D | asmMap.s | 11 #CHECK: 3c07c012 { memb(r7+#0) = #18 12 memb(r7)=#18 14 #CHECK: 4101c008 { if (p0) r8 = memb(r1+#0) 15 if (p0) r8=memb(r1) 17 #CHECK: 4519d817 { if (!p3) r23 = memb(r25+#0) 18 if (!p3) r23=memb(r25) 68 #CHECK: 910bc017 { r23 = memb(r11+#0) 69 r23=memb(r11) 80 #CHECK: 400ecd00 { if (p0) memb(r14+#0) = r13 81 if (p0) memb(r14)=r13 [all …]
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D | extender.s | 6 memb(##1024056) = r0 10 # CHECK: memb(##1024056) = r0 14 memb(GP + #56) = r0 17 # CHECK: memb(gp+#56) = r0 52 memb(##1024056) = r0.new 57 # CHECK: memb(##1024056) = r0.new 62 memb(GP + #56) = r0.new 66 # CHECK: memb(gp+#56) = r0.new 123 r0 = memb(##1024056) 127 # CHECK: r0 = memb(##1024056) [all …]
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D | store-GPRel.s | 21 #CHECK: 4eb3e2fc memb(gp+#59388) = r17.new 23 memb(gp+#59388) = r17.new } 24 #CHECK: 4eb3e2fc memb(gp+#59388) = r17.new 26 memb(#59388) = r17.new } 43 #CHECK: 4a00cea2 { memb(gp+#16546) = r14 44 { memb(gp+#16546) = r14 } 45 #CHECK: 4a00cea2 { memb(gp+#16546) = r14 46 { memb(#16546) = r14 }
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D | smallcore_dis.s | 7 r1 = memb(r0) 8 if (p0) memb(r0) = r2 11 # CHECK: { r1 = memb(r0+#0) 12 # CHECK-NEXT: if (p0) memb(r0+#0) = r2 }
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D | load-GPRel.s | 10 #CHECK: 4d1ac4d2 { r18 = memb(gp+#46118) } 11 r18 = memb(gp+#46118) 12 #CHECK: 4d1ac4d2 { r18 = memb(gp+#46118) } 13 r18 = memb(#46118)
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D | new-value-check.s | 11 if (!p3) memb(r20) = r0.new 37 if (p2) memb(r20) = r0.new 44 memb(r20) = r0.new 54 if (p2) memb(r20) = r0.new 60 if (p3) memb(r20) = r0.new 67 if (p0) memb(r20) = r0.new
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D | guest.s | 51 memb(r11+#-478)=r17.new 56 # CHECK: memb(r11+#-478) = r17.new } 62 memb(r11+#-478)=r17.new 67 # CHECK: memb(r11+#-478) = r17.new }
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/external/llvm/test/MC/Hexagon/ |
D | asmMap.s | 11 #CHECK: 3c07c012 { memb(r7{{ *}}+{{ *}}#0)=#18 12 memb(r7)=#18 14 #CHECK: 4101c008 { if (p0) r8 = memb(r1{{ *}}+{{ *}}#0) 15 if (p0) r8=memb(r1) 17 #CHECK: 4519d817 { if (!p3) r23 = memb(r25{{ *}}+{{ *}}#0) 18 if (!p3) r23=memb(r25) 68 #CHECK: 910bc017 { r23 = memb(r11{{ *}}+{{ *}}#0) 69 r23=memb(r11) 80 #CHECK: 400ecd00 { if (p0) memb(r14{{ *}}+{{ *}}#0) = r13 81 if (p0) memb(r14)=r13 [all …]
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D | new-value-check.s | 11 if (!p3) memb(r20) = r0.new 40 if (p2) memb(r20) = r0.new 47 memb(r20) = r0.new 57 if (p2) memb(r20) = r0.new 63 if (p3) memb(r20) = r0.new 70 if (p0) memb(r20) = r0.new
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/external/llvm/test/MC/Disassembler/Hexagon/ |
D | memop.txt | 6 # CHECK: memb(r17+#51) += r21 8 # CHECK: memb(r17+#51) -= r21 10 # CHECK: memb(r17+#51) &= r21 12 # CHECK: memb(r17+#51) |= r21 14 # CHECK: memb(r17+#51) += #21 16 # CHECK: memb(r17+#51) -= #21 18 # CHECK: memb(r17+#51) = clrbit(#21) 20 # CHECK: memb(r17+#51) = setbit(#21)
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D | st.txt | 70 # CHECK: memb(r17 + r21<<#3) = r31 72 # CHECK: memb(r17+#21)=#31 74 # CHECK: memb(#21) = r21 76 # CHECK: memb(##21) = r21 78 # CHECK: memb(r17+#21) = r21 80 # CHECK: memb(r17 ++ I:circ(m1)) = r21 82 # CHECK: memb(r17 ++ #5:circ(m1)) = r21 84 # CHECK: memb(r17++#5) = r21 86 # CHECK: memb(r17<<#3 + ##21) = r31 88 # CHECK: memb(r17++m1) = r21 [all …]
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D | nv_st.txt | 7 # CHECK-NEXT: memb(r17 + r21<<#3) = r31.new 10 # CHECK-NEXT: memb(#17) = r31.new 13 # CHECK-NEXT: memb(r17+#21) = r31.new 16 # CHECK-NEXT: memb(r17 ++ I:circ(m1)) = r31.new 19 # CHECK-NEXT: memb(r17 ++ #5:circ(m1)) = r31.new 22 # CHECK-NEXT: memb(r17++#5) = r31.new 25 # CHECK-NEXT: memb(r17++m1) = r31.new 28 # CHECK-NEXT: memb(r17 ++ m1:brev) = r31.new 33 # CHECK-NEXT: if (p3) memb(r17+r21<<#3) = r31.new 36 # CHECK-NEXT: if (!p3) memb(r17+r21<<#3) = r31.new [all …]
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D | ld.txt | 60 # CHECK: r17 = memb(r21 + r31<<#3) 62 # CHECK: r17 = memb(#21) 64 # CHECK: r17 = memb(##21) 66 # CHECK: r17 = memb(r21 + #31) 68 # CHECK: r17 = memb(r21 ++ #5:circ(m1)) 70 # CHECK: r17 = memb(r21 ++ I:circ(m1)) 72 # CHECK: r17 = memb(r21 = ##31) 74 # CHECK: r17 = memb(r21++#5) 76 # CHECK: r17 = memb(r21++m1) 78 # CHECK: r17 = memb(r21 ++ m1:brev) [all …]
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/external/llvm-project/llvm/test/MC/Disassembler/Hexagon/ |
D | memop.txt | 6 # CHECK: memb(r17+#51) += r21 8 # CHECK: memb(r17+#51) -= r21 10 # CHECK: memb(r17+#51) &= r21 12 # CHECK: memb(r17+#51) |= r21 14 # CHECK: memb(r17+#51) += #21 16 # CHECK: memb(r17+#51) -= #21 18 # CHECK: memb(r17+#51) = clrbit(#21) 20 # CHECK: memb(r17+#51) = setbit(#21)
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D | st.txt | 70 # CHECK: memb(r17+r21<<#3) = r31 72 # CHECK: memb(r17+#21) = #31 74 # CHECK: memb(gp+#21) = r21 76 # CHECK: memb(##21) = r21 78 # CHECK: memb(r17+#21) = r21 80 # CHECK: memb(r17++I:circ(m1)) = r21 82 # CHECK: memb(r17++#5:circ(m1)) = r21 84 # CHECK: memb(r17++#5) = r21 86 # CHECK: memb(r17<<#3+##21) = r31 88 # CHECK: memb(r17++m1) = r21 [all …]
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D | nv_st.txt | 7 # CHECK-NEXT: memb(r17+r21<<#3) = r31.new 10 # CHECK-NEXT: memb(gp+#17) = r31.new 13 # CHECK-NEXT: memb(r17+#21) = r31.new 16 # CHECK-NEXT: memb(r17++I:circ(m1)) = r31.new 19 # CHECK-NEXT: memb(r17++#5:circ(m1)) = r31.new 22 # CHECK-NEXT: memb(r17++#5) = r31.new 25 # CHECK-NEXT: memb(r17++m1) = r31.new 28 # CHECK-NEXT: memb(r17++m1:brev) = r31.new 33 # CHECK-NEXT: if (p3) memb(r17+r21<<#3) = r31.new 36 # CHECK-NEXT: if (!p3) memb(r17+r21<<#3) = r31.new [all …]
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D | ld.txt | 60 # CHECK: r17 = memb(r21+r31<<#3) 62 # CHECK: r17 = memb(gp+#21) 64 # CHECK: r17 = memb(##21) 66 # CHECK: r17 = memb(r21+#31) 68 # CHECK: r17 = memb(r21++#5:circ(m1)) 70 # CHECK: r17 = memb(r21++I:circ(m1)) 72 # CHECK: r17 = memb(r21=##31) 74 # CHECK: r17 = memb(r21++#5) 76 # CHECK: r17 = memb(r21++m1) 78 # CHECK: r17 = memb(r21++m1:brev) [all …]
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/external/llvm/test/CodeGen/Hexagon/ |
D | addrmode-indoff.ll | 16 ; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#0{{ *}}+{{ *}}##gb) 33 ; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#2{{ *}}+{{ *}}##gb) 42 ; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#0{{ *}}+{{ *}}##ga) 50 ; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#0{{ *}}+{{ *}}##gb) 58 ; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#2{{ *}}+{{ *}}##ga) 67 ; CHECK: memb(r{{[0-9]+}}{{ *}}<<{{ *}}#2{{ *}}+{{ *}}##gb)
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/external/llvm-project/llvm/test/CodeGen/Hexagon/ |
D | addrmode-indoff.ll | 17 ; CHECK: memb(r{{[0-9]+}}+##ga) 36 ; CHECK: memb(r{{[0-9]+}}<<#1+##ga) 56 ; CHECK: memb(r{{[0-9]+}}<<#2+##ga) 66 ; CHECK: memb(r{{[0-9]+}}+##ga) 75 ; CHECK: memb(r{{[0-9]+}}<<#1+##ga) 85 ; CHECK: memb(r{{[0-9]+}}<<#2+##ga)
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D | memops_global.ll | 11 ; CHECK: memb(r{{[0-9]+}}+#0) += #1 21 ; CHECK: memb(r{{[0-9]+}}+#0) -= #1 31 ; CHECK: memb(r{{[0-9]+}}+#0) += #5 43 ; CHECK: memb(r{{[0-9]+}}+#0) -= #5 55 ; CHECK: memb(r{{[0-9]+}}+#0) -= #5 67 ; CHECK: memb(r{{[0-9]+}}+#0) += #5 79 ; CHECK: memb(r{{[0-9]+}}+#0) += r{{[0-9]+}} 92 ; CHECK: memb(r{{[0-9]+}}+#0) -= r{{[0-9]+}} 105 ; CHECK: memb(r{{[0-9]+}}+#0) |= r{{[0-9]+}} 115 ; CHECK: memb(r{{[0-9]+}}+#0) &= r{{[0-9]+}} [all …]
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D | store-imm-amode.ll | 10 ; CHECK: memb(r0+#0) = #-1 18 ; CHECK: memb(r0+r1<<#0) = [[RV]] 27 ; CHECK: memb(r0+##var_i8) = [[RV]] 36 ; CHECK: memb(r0<<#2+##var_i8) = [[RV]]
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D | memops.ll | 7 ; CHECK: memb(r{{[0-9]+}}+#0) += #5 19 ; CHECK: memb(r{{[0-9]+}}+#0) += r{{[0-9]+}} 32 ; CHECK: memb(r{{[0-9]+}}+#0) -= r{{[0-9]+}} 45 ; CHECK: memb(r{{[0-9]+}}+#0) |= r{{[0-9]+}} 55 ; CHECK: memb(r{{[0-9]+}}+#0) &= r{{[0-9]+}} 65 ; CHECK: memb(r{{[0-9]+}}+#0) = clrbit(#5) 77 ; CHECK: memb(r{{[0-9]+}}+#0) = setbit(#7) 89 ; CHECK: memb(r{{[0-9]+}}+#0) += #5 102 ; CHECK: memb(r{{[0-9]+}}+#0) += r{{[0-9]+}} 116 ; CHECK: memb(r{{[0-9]+}}+#0) -= r{{[0-9]+}} [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrAlias.td | 13 def : InstAlias<"memb({GP}+#$addr) = $Nt.new", 19 def : InstAlias<"memb({GP}+#$addr) = $Nt", 30 def : InstAlias<"$Nt = memb({GP}+#$addr)", 44 def : InstAlias<"memb($Rs) = $Rt", 56 def : InstAlias<"memb($Rs) = $Rt.new", 65 def : InstAlias<"memb($Rs) = #$S8", 77 def : InstAlias<"memb($Rs) = setbit(#$U5)", 86 def : InstAlias<"memb($Rs) = clrbit(#$U5)", 96 def : InstAlias<"$Rd = memb($Rs)", 134 def : InstAlias<"if ($Pt) $Rd = memb($Rs)", [all …]
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