Home
last modified time | relevance | path

Searched refs:mesaVis (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_screen.c850 const struct gl_config * mesaVis, GLboolean isPixmap) in intelCreateBuffer() argument
863 _mesa_initialize_window_framebuffer(fb, mesaVis); in intelCreateBuffer()
865 if (mesaVis->redBits == 5) in intelCreateBuffer()
867 else if (mesaVis->sRGBCapable) in intelCreateBuffer()
869 else if (mesaVis->alphaBits == 0) in intelCreateBuffer()
878 if (mesaVis->doubleBufferMode) { in intelCreateBuffer()
888 if (mesaVis->depthBits == 24) { in intelCreateBuffer()
889 assert(mesaVis->stencilBits == 8); in intelCreateBuffer()
899 else if (mesaVis->depthBits == 16) { in intelCreateBuffer()
900 assert(mesaVis->stencilBits == 0); in intelCreateBuffer()
[all …]
Di830_context.c55 const struct gl_config * mesaVis, in i830CreateContext() argument
78 mesaVis, driContextPriv, in i830CreateContext()
Di915_context.c158 const struct gl_config * mesaVis, in i915CreateContext() argument
181 mesaVis, driContextPriv, in i915CreateContext()
Di830_context.h182 const struct gl_config * mesaVis,
Di915_context.h318 const struct gl_config * mesaVis,
Dintel_context.h344 const struct gl_config * mesaVis,
Dintel_context.c406 const struct gl_config * mesaVis, in intelInitContext() argument
426 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx, in intelInitContext()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dradeon_screen.c666 const struct gl_config *mesaVis, in radeonCreateBuffer() argument
673 const GLboolean swAccum = mesaVis->accumRedBits > 0; in radeonCreateBuffer()
674 const GLboolean swStencil = mesaVis->stencilBits > 0 && in radeonCreateBuffer()
675 mesaVis->depthBits != 24; in radeonCreateBuffer()
686 _mesa_initialize_window_framebuffer(&rfb->base, mesaVis); in radeonCreateBuffer()
688 if (mesaVis->redBits == 5) in radeonCreateBuffer()
695 else if (mesaVis->alphaBits == 0) in radeonCreateBuffer()
716 if (mesaVis->doubleBufferMode) { in radeonCreateBuffer()
722 if (mesaVis->depthBits == 24) { in radeonCreateBuffer()
723 if (mesaVis->stencilBits == 8) { in radeonCreateBuffer()
[all …]
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_screen.c666 const struct gl_config *mesaVis, in radeonCreateBuffer() argument
673 const GLboolean swAccum = mesaVis->accumRedBits > 0; in radeonCreateBuffer()
674 const GLboolean swStencil = mesaVis->stencilBits > 0 && in radeonCreateBuffer()
675 mesaVis->depthBits != 24; in radeonCreateBuffer()
686 _mesa_initialize_window_framebuffer(&rfb->base, mesaVis); in radeonCreateBuffer()
688 if (mesaVis->redBits == 5) in radeonCreateBuffer()
695 else if (mesaVis->alphaBits == 0) in radeonCreateBuffer()
716 if (mesaVis->doubleBufferMode) { in radeonCreateBuffer()
722 if (mesaVis->depthBits == 24) { in radeonCreateBuffer()
723 if (mesaVis->stencilBits == 8) { in radeonCreateBuffer()
[all …]
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_screen.c1734 const struct gl_config * mesaVis, GLboolean isPixmap) in intelCreateBuffer() argument
1741 intel_quantize_num_samples(screen, mesaVis->samples); in intelCreateBuffer()
1750 _mesa_initialize_window_framebuffer(fb, mesaVis); in intelCreateBuffer()
1757 if (mesaVis->redBits == 16 && mesaVis->alphaBits > 0 && mesaVis->floatMode) { in intelCreateBuffer()
1759 } else if (mesaVis->redBits == 16 && mesaVis->floatMode) { in intelCreateBuffer()
1761 } else if (mesaVis->redBits == 10 && mesaVis->alphaBits > 0) { in intelCreateBuffer()
1762 rgbFormat = mesaVis->redMask == 0x3ff00000 ? MESA_FORMAT_B10G10R10A2_UNORM in intelCreateBuffer()
1764 } else if (mesaVis->redBits == 10) { in intelCreateBuffer()
1765 rgbFormat = mesaVis->redMask == 0x3ff00000 ? MESA_FORMAT_B10G10R10X2_UNORM in intelCreateBuffer()
1767 } else if (mesaVis->redBits == 5) { in intelCreateBuffer()
[all …]
Dbrw_context.c938 const struct gl_config *mesaVis, in brwCreateContext() argument
1016 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) { in brwCreateContext()
Dbrw_context.h1287 const struct gl_config *mesaVis,