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Searched refs:mfhi (Results 1 – 25 of 186) sorted by relevance

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/external/llvm-project/llvm/test/MC/Mips/
Dmacro-remu.s11 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
14 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
35 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
38 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
43 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
46 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
51 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
54 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
60 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
63 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
[all …]
Dmacro-dremu.s12 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
15 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
36 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
39 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
44 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
47 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
53 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
57 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
62 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
65 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
[all …]
Dmacro-rem.s21 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
30 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
55 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
58 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
63 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
66 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
71 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
74 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
79 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
82 # CHECK-TRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
[all …]
Dmacro-drem.s22 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
42 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
47 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
53 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
58 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
63 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
79 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
108 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
113 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
119 # CHECK-NOTRAP: mfhi $4 # encoding: [0x10,0x20,0x00,0x00]
[all …]
Dmul-macro-variants.s67 # CHECK: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
75 # CHECK-TRAP: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
83 # CHECK: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
91 # CHECK-TRAP: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
96 # CHECK: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
102 # CHECK-TRAP: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
107 # CHECK: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
113 # CHECK-TRAP: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
133 # CHECK: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
141 # CHECK-TRAP: mfhi $1 # encoding: [0x00,0x00,0x08,0x10]
[all …]
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dsrem.ll42 ; NOT-R6: mfhi $[[T0:[0-9]+]]
53 ; MMR3: mfhi $[[T0:[0-9]+]]
72 ; NOT-R2-R6: mfhi $[[T0:[0-9]+]]
78 ; R2-R5: mfhi $[[T0:[0-9]+]]
87 ; MMR3: mfhi $[[T0:[0-9]+]]
104 ; NOT-R2-R6: mfhi $[[T0:[0-9]+]]
110 ; R2-R5: mfhi $[[T0:[0-9]+]]
119 ; MMR3: mfhi $[[T0:[0-9]+]]
136 ; NOT-R6: mfhi $2
143 ; MMR3: mfhi $2
[all …]
Durem.ll44 ; NOT-R6: mfhi $[[T2:[0-9]+]]
59 ; MMR3: mfhi $[[T2:[0-9]+]]
82 ; NOT-R2-R6: mfhi $[[T2:[0-9]+]]
90 ; R2-R5: mfhi $[[T2:[0-9]+]]
103 ; MMR3: mfhi $[[T2:[0-9]+]]
124 ; NOT-R2-R6: mfhi $[[T2:[0-9]+]]
132 ; R2-R5: mfhi $[[T3:[0-9]+]]
145 ; MMR3: mfhi $[[T2:[0-9]+]]
164 ; NOT-R6: mfhi $2
171 ; MMR3: mfhi $2
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/
Dmadd-msub.ll18 ; 32-NEXT: mfhi $2
39 ; DSP-NEXT: mfhi $2, $ac0
66 ; 16-NEXT: mfhi $3
90 ; 32-NEXT: mfhi $2
109 ; DSP-NEXT: mfhi $2, $ac0
130 ; 16-NEXT: mfhi $4
151 ; 32-NEXT: mfhi $2
170 ; DSP-NEXT: mfhi $2, $ac0
195 ; 16-NEXT: mfhi $3
267 ; 32-NEXT: mfhi $2
[all …]
Ddivrem.ll75 ; ACC32: mfhi $2
76 ; ACC64: mfhi $2
128 ; ACC32: mfhi $2
129 ; ACC64: mfhi $2
145 ; ACC32: mfhi $[[R0:[0-9]+]]
152 ; ACC64: mfhi $[[R0:[0-9]+]]
186 ; ACC32: mfhi $[[R0:[0-9]+]]
193 ; ACC64: mfhi $[[R0:[0-9]+]]
267 ; ACC64: mfhi $2
312 ; ACC64: mfhi $2
[all …]
Dmips64muldiv.ll32 ; ACC: mfhi $[[T1:[0-9]+]]
65 ; ACC: mfhi $2
75 ; ACC: mfhi $2
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/
Dmul.ll94 ; MIPS32-NEXT: mfhi $3
123 ; MIPS32-NEXT: mfhi $5
135 ; MIPS32-NEXT: mfhi $15
137 ; MIPS32-NEXT: mfhi $11
162 ; MIPS32-NEXT: mfhi $8
164 ; MIPS32-NEXT: mfhi $7
166 ; MIPS32-NEXT: mfhi $6
186 ; MIPS32-NEXT: mfhi $2
Drem_and_div.ll109 ; MIPS32-NEXT: mfhi $1
124 ; MIPS32-NEXT: mfhi $2
236 ; MIPS32-NEXT: mfhi $1
253 ; MIPS32-NEXT: mfhi $1
268 ; MIPS32-NEXT: mfhi $2
/external/llvm/test/CodeGen/Mips/
Ddivrem.ll75 ; ACC32: mfhi $2
76 ; ACC64: mfhi $2
128 ; ACC32: mfhi $2
129 ; ACC64: mfhi $2
145 ; ACC32: mfhi $[[R0:[0-9]+]]
152 ; ACC64: mfhi $[[R0:[0-9]+]]
186 ; ACC32: mfhi $[[R0:[0-9]+]]
193 ; ACC64: mfhi $[[R0:[0-9]+]]
267 ; ACC64: mfhi $2
312 ; ACC64: mfhi $2
[all …]
Dmips64muldiv.ll32 ; ACC: mfhi $[[T1:[0-9]+]]
65 ; ACC: mfhi $2
75 ; ACC: mfhi $2
Dmadd-msub.ll23 ; DSP-DAG: mfhi $2, $[[AC]]
69 ; DSP-DAG: mfhi $2, $[[AC]]
107 ; DSP-DAG: mfhi $2, $[[AC]]
148 ; DSP-DAG: mfhi $2, $[[AC]]
194 ; DSP-DAG: mfhi $2, $[[AC]]
234 ; DSP-DAG: mfhi $2, $[[AC]]
/external/capstone/suite/MC/Mips/
Dmips-dsp-instructions.s.cs30 0x00,0x20,0x70,0x10 = mfhi $t6, $ac1
40 0x00,0x00,0x70,0x10 = mfhi $t6
/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Durem.ll79 ; GP32R0R2-NEXT: mfhi $1
90 ; GP32R2R5-NEXT: mfhi $1
109 ; GP64R0R1-NEXT: mfhi $1
120 ; GP64R2R5-NEXT: mfhi $1
163 ; GP32R0R2-NEXT: mfhi $1
174 ; GP32R2R5-NEXT: mfhi $1
193 ; GP64R0R1-NEXT: mfhi $1
204 ; GP64R2R5-NEXT: mfhi $1
246 ; GP32-NEXT: mfhi $2
259 ; GP64-NEXT: mfhi $2
[all …]
Dsrem.ll77 ; GP32R0R2-NEXT: mfhi $1
86 ; GP32R2R5-NEXT: mfhi $1
101 ; GP64R0R1-NEXT: mfhi $1
110 ; GP64R2R5-NEXT: mfhi $1
145 ; GP32R0R2-NEXT: mfhi $1
154 ; GP32R2R5-NEXT: mfhi $1
169 ; GP64R0R1-NEXT: mfhi $1
178 ; GP64R2R5-NEXT: mfhi $1
214 ; GP32-NEXT: mfhi $2
227 ; GP64-NEXT: mfhi $2
[all …]
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Drem1.ll26 ; CHECK-DAG: mfhi $[[RESULT:[0-9]+]]
49 ; CHECK-DAG: mfhi $[[RESULT:[0-9]+]]
/external/llvm-project/llvm/test/CodeGen/Mips/Fast-ISel/
Drem1.ll26 ; CHECK-DAG: mfhi $[[RESULT:[0-9]+]]
49 ; CHECK-DAG: mfhi $[[RESULT:[0-9]+]]
/external/llvm/test/MC/Mips/
Dmicromips-16-bit-instructions.s43 # CHECK-EL: mfhi $9 # encoding: [0x09,0x46]
98 # CHECK-EB: mfhi $9 # encoding: [0x46,0x09]
151 mfhi $9
/external/llvm-project/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1.s15 …mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
16 …mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1.s15 …mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
16 …mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips3.s14 …mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
15 …mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm-project/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips3.s14 …mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
15 …mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…

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