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Searched refs:midgard_reg_mode (Results 1 – 8 of 8) sorted by relevance

/external/mesa3d/src/panfrost/midgard/
Dmidgard.h227 } midgard_reg_mode; typedef
266 midgard_reg_mode reg_mode : 2;
Dmidgard_print_constant.c34 midgard_reg_mode reg_mode, bool half, in mir_print_constant_component()
Dhelpers.h349 unsigned c, midgard_reg_mode reg_mode, bool half,
Ddisassemble.c320 bits_for_mode(midgard_reg_mode mode) in bits_for_mode()
338 bits_for_mode_halved(midgard_reg_mode mode, bool half) in bits_for_mode_halved()
461 midgard_reg_mode mode, unsigned reg, in print_vector_src()
521 print_dest(FILE *fp, unsigned reg, midgard_reg_mode mode, midgard_dest_override override) in print_dest()
635 midgard_reg_mode mode = alu_field->reg_mode; in print_vector_field()
Dmidgard_print.c121 midgard_reg_mode reg_mode = reg_mode_for_bitsize(max_bitsize_for_alu(ins)); in mir_print_embedded_constant()
Dcompiler.h515 midgard_reg_mode reg_mode_for_bitsize(unsigned bitsize);
Dmidgard_emit.c198 nir_alu_type T, midgard_reg_mode reg_mode, in mir_pack_swizzle()
Dmidgard_compile.c2279 midgard_reg_mode