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Searched refs:mmUVD_CTX_DATA (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_vcn_dec_jpeg.c75 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, 0x01400200); in send_cmd_bitstream()
77 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, (1 << 9)); in send_cmd_bitstream()
85 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, (0 << 9)); in send_cmd_bitstream()
147 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, (dec->jpg.bsd_size >> 2)); in send_cmd_target()
149 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, 0x01400200); in send_cmd_target()
154 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, 0xFFFFFFFF); in send_cmd_target()
162 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, (1 << 23 | 1 << 0)); in send_cmd_target()
163 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE1, 0); in send_cmd_target()
170 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, (1 << 9)); in send_cmd_target()
178 set_reg_jpeg(dec, SOC15_REG_ADDR(mmUVD_CTX_DATA), COND0, TYPE0, (0 << 9)); in send_cmd_target()
[all …]
Dradeon_vcn_dec.h166 #define mmUVD_CTX_DATA 0x0529 macro