Home
last modified time | relevance | path

Searched refs:mmap_add_region (Results 1 – 25 of 35) sorted by relevance

12

/external/arm-trusted-firmware/plat/socionext/synquacer/
Dsq_xlat_setup.c20 mmap_add_region(total_base, total_base, in sq_mmap_setup()
27 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in sq_mmap_setup()
34 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, in sq_mmap_setup()
42 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in sq_mmap_setup()
47 mmap_add_region(SQ_REG_REGION_BASE, SQ_REG_REGION_BASE, in sq_mmap_setup()
/external/arm-trusted-firmware/plat/socionext/uniphier/
Duniphier_xlat_setup.c41 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in uniphier_mmap_setup()
48 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in uniphier_mmap_setup()
55 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in uniphier_mmap_setup()
61 mmap_add_region(uniphier_reg_region[soc].base, in uniphier_mmap_setup()
/external/arm-trusted-firmware/plat/marvell/armada/common/aarch64/
Dmarvell_common.c52 mmap_add_region(total_base, total_base, in marvell_setup_page_tables()
59 mmap_add_region(code_start, code_start, in marvell_setup_page_tables()
66 mmap_add_region(rodata_start, rodata_start, in marvell_setup_page_tables()
74 mmap_add_region(coh_start, coh_start, in marvell_setup_page_tables()
/external/arm-trusted-firmware/plat/rockchip/common/aarch32/
Dplatform_common.c26 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_svc_mon()
28 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_svc_mon()
30 mmap_add_region(coh_start, coh_start, coh_limit - coh_start, in plat_configure_mmu_svc_mon()
/external/arm-trusted-firmware/plat/layerscape/common/
Dls_common.c91 mmap_add_region(total_base, total_base, in ls_setup_page_tables()
98 mmap_add_region(code_start, code_start, in ls_setup_page_tables()
105 mmap_add_region(rodata_start, rodata_start, in ls_setup_page_tables()
113 mmap_add_region(coh_start, coh_start, in ls_setup_page_tables()
/external/arm-trusted-firmware/plat/qemu/common/
Dqemu_common.c137 mmap_add_region(total_base, total_base, \
140 mmap_add_region(code_start, code_start, \
143 mmap_add_region(ro_start, ro_start, \
146 mmap_add_region(coh_start, coh_start, \
/external/arm-trusted-firmware/plat/rockchip/common/aarch64/
Dplatform_common.c39 mmap_add_region(total_base, total_base, \
42 mmap_add_region(ro_start, ro_start, \
45 mmap_add_region(coh_start, coh_start, \
/external/arm-trusted-firmware/plat/hisilicon/poplar/aarch64/
Dplatform_common.c58 mmap_add_region(total_base, total_base, \
61 mmap_add_region(ro_start, ro_start, \
64 mmap_add_region(coh_start, coh_start, \
/external/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/
Dplatform_common.c48 mmap_add_region(total_base, total_base, \
51 mmap_add_region(ro_start, ro_start, \
54 mmap_add_region(coh_start, coh_start, \
/external/arm-trusted-firmware/plat/qti/common/src/
Dqti_common.c94 mmap_add_region(total_base, total_base, in qti_setup_page_tables()
100 mmap_add_region(code_start, code_start, in qti_setup_page_tables()
106 mmap_add_region(rodata_start, rodata_start, in qti_setup_page_tables()
112 mmap_add_region(coh_start, coh_start, in qti_setup_page_tables()
/external/arm-trusted-firmware/plat/mediatek/mt8183/aarch64/
Dplatform_common.c45 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
47 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_el3()
49 mmap_add_region(coh_start, coh_start, coh_limit - coh_start, in plat_configure_mmu_el3()
/external/arm-trusted-firmware/plat/hisilicon/hikey960/aarch64/
Dhikey960_common.c97 mmap_add_region(total_base, total_base, \
100 mmap_add_region(ro_start, ro_start, \
103 mmap_add_region(coh_start, coh_start, \
/external/arm-trusted-firmware/plat/hisilicon/hikey/aarch64/
Dhikey_common.c101 mmap_add_region(total_base, total_base, \
104 mmap_add_region(ro_start, ro_start, \
107 mmap_add_region(coh_start, coh_start, \
/external/arm-trusted-firmware/plat/rpi/common/
Drpi3_common.c165 mmap_add_region(total_base, total_base, in rpi3_setup_page_tables()
172 mmap_add_region(code_start, code_start, in rpi3_setup_page_tables()
179 mmap_add_region(rodata_start, rodata_start, in rpi3_setup_page_tables()
187 mmap_add_region(coh_start, coh_start, in rpi3_setup_page_tables()
/external/arm-trusted-firmware/plat/renesas/common/aarch64/
Dplatform_common.c154 mmap_add_region(total_base, total_base, total_size, in rcar_configure_mmu_el3()
156 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in rcar_configure_mmu_el3()
158 mmap_add_region(coh_start, coh_start, coh_limit - coh_start, in rcar_configure_mmu_el3()
171 mmap_add_region(total_base, total_base, total_size, in rcar_configure_mmu_el3()
173 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in rcar_configure_mmu_el3()
/external/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_bl31_setup.c296 mmap_add_region(rw_start, rw_start, in bl31_plat_arch_setup()
299 mmap_add_region(rodata_start, rodata_start, in bl31_plat_arch_setup()
302 mmap_add_region(code_base, code_base, in bl31_plat_arch_setup()
308 mmap_add_region(params_from_bl2->tzdram_base, in bl31_plat_arch_setup()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mm/
Dimx8mm_bl31_setup.c144 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
146 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, (BL_CODE_END - BL_CODE_BASE), in bl31_plat_arch_setup()
149 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in bl31_plat_arch_setup()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mp/
Dimx8mp_bl31_setup.c142 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
144 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, (BL_CODE_END - BL_CODE_BASE), in bl31_plat_arch_setup()
147 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in bl31_plat_arch_setup()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mn/
Dimx8mn_bl31_setup.c144 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
146 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, (BL_CODE_END - BL_CODE_BASE), in bl31_plat_arch_setup()
149 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in bl31_plat_arch_setup()
/external/arm-trusted-firmware/plat/mediatek/mt8192/aarch64/
Dplatform_common.c34 mmap_add_region(total_base, total_base, total_size, in plat_configure_mmu_el3()
36 mmap_add_region(ro_start, ro_start, ro_limit - ro_start, in plat_configure_mmu_el3()
/external/arm-trusted-firmware/plat/allwinner/common/
Dsunxi_common.c44 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, in sunxi_configure_mmu_el3()
47 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, in sunxi_configure_mmu_el3()
50 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in sunxi_configure_mmu_el3()
/external/arm-trusted-firmware/plat/imx/imx8m/imx8mq/
Dimx8mq_bl31_setup.c166 mmap_add_region(BL31_BASE, BL31_BASE, (BL31_LIMIT - BL31_BASE), in bl31_plat_arch_setup()
168 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, (BL_CODE_END - BL_CODE_BASE), in bl31_plat_arch_setup()
174 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, in bl31_plat_arch_setup()
/external/arm-trusted-firmware/plat/mediatek/mt6795/
Dbl31_plat_setup.c81 mmap_add_region(total_base, total_base, \
84 mmap_add_region(ro_start, ro_start, \
87 mmap_add_region(coh_start, coh_start, \
267 mmap_add_region( in bl31_plat_arch_setup()
/external/arm-trusted-firmware/plat/rpi/rpi4/
Drpi4_bl31_setup.c183 mmap_add_region(dtb_region, dtb_region, 4U << 20, in bl31_plat_arch_setup()
191 mmap_add_region(0, 0, 4096, MT_NON_CACHEABLE | MT_RW | MT_SECURE); in bl31_plat_arch_setup()
/external/arm-trusted-firmware/plat/imx/imx8qx/
Dimx8qx_bl31_setup.c342 mmap_add_region(ro_start, ro_start, ro_size, in bl31_plat_arch_setup()
344 mmap_add_region(rw_start, rw_start, rw_size, in bl31_plat_arch_setup()
349 mmap_add_region(coh_start, coh_start, coh_size, in bl31_plat_arch_setup()

12