/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | dp-3source.ll | 115 ; CHECK: mneg {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 123 ; CHECK: mneg {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}} 176 ; CHECK: mneg {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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D | aarch64-fix-cortex-a53-835769.ll | 129 ; FIXME-CHECK-NEXT: mneg 131 ; FIXME-CHECK-NOWORKAROUND-NEXT: mneg 146 ; FIXME-CHECK-NEXT: mneg 148 ; FIXME-CHECK-NOWORKAROUND-NEXT: mneg
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/external/llvm/test/CodeGen/AArch64/ |
D | dp-3source.ll | 115 ; CHECK: mneg {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 123 ; CHECK: mneg {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}} 176 ; CHECK: mneg {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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D | aarch64-fix-cortex-a53-835769.ll | 129 ; FIXME-CHECK-NEXT: mneg 131 ; FIXME-CHECK-NOWORKAROUND-NEXT: mneg 146 ; FIXME-CHECK-NEXT: mneg 148 ; FIXME-CHECK-NOWORKAROUND-NEXT: mneg
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 612 0xa4,0xfc,0x06,0x1b = mneg w4, w5, w6 617 0xa4,0xfc,0x06,0x9b = mneg x4, x5, x6 654 0xd5,0xfe,0x17,0x1b = mneg w21, w22, w23 655 0x1f,0xff,0x19,0x1b = mneg wzr, w24, w25 656 0xfa,0xff,0x1b,0x1b = mneg w26, wzr, w27 657 0xbc,0xff,0x1f,0x1b = mneg w28, w29, wzr
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | basic-a64-instructions.s | 1662 mneg w21, w22, w23 1663 mneg wzr, w24, w25 1664 mneg w26, wzr, w27 1665 mneg w28, w29, wzr
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/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
D | A55-basic-instructions.s | 508 mneg w4, w5, w6 label 513 mneg x4, x5, x6 label 536 mneg w21, w22, w23 label 1825 # CHECK-NEXT: 1 4 1.00 mneg w4, w5, w6 1830 # CHECK-NEXT: 1 4 1.00 mneg x4, x5, x6 1853 # CHECK-NEXT: 1 4 1.00 mneg w21, w22, w23 3008 … - - - - - - - - - - 1.00 - mneg w4, w5, w6 3013 … - - - - - - - - - - 1.00 - mneg x4, x5, x6 3036 … - - - - - - - - - 1.00 - mneg w21, w22, w23
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/external/llvm/test/MC/AArch64/ |
D | basic-a64-instructions.s | 1679 mneg w21, w22, w23 1680 mneg wzr, w24, w25 1681 mneg w26, wzr, w27 1682 mneg w28, w29, wzr
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 423 COMPARE(mneg(w0, w1, w2), "mneg w0, w1, w2"); in TEST() 424 COMPARE(mneg(x3, x4, x5), "mneg x3, x4, x5"); in TEST() 425 COMPARE(mneg(w30, w0, w1), "mneg w30, w0, w1"); in TEST() 426 COMPARE(mneg(x30, x0, x1), "mneg x30, x0, x1"); in TEST()
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D | test-trace-aarch64.cc | 241 __ mneg(w5, w6, w7); in GenerateTestSequenceBase() local 242 __ mneg(x8, x9, x10); in GenerateTestSequenceBase() local
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D | test-cpu-features-aarch64.cc | 367 TEST_NONE(mneg_0, mneg(w0, w1, w2)) 368 TEST_NONE(mneg_1, mneg(x0, x1, x2))
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 1148 # CHECK: mneg w4, w5, w6 1159 # CHECK: mneg x4, x5, x6 1245 # CHECK: mneg w21, w22, w23 1246 # CHECK: mneg wzr, w24, w25 1247 # CHECK: mneg w26, wzr, w27 1248 # CHECK: mneg w28, w29, wzr
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/external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 1135 # CHECK: mneg w4, w5, w6 1146 # CHECK: mneg x4, x5, x6 1232 # CHECK: mneg w21, w22, w23 1233 # CHECK: mneg wzr, w24, w25 1234 # CHECK: mneg w26, wzr, w27 1235 # CHECK: mneg w28, w29, wzr
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 185 0x~~~~~~~~~~~~~~~~ 1b07fcc5 mneg w5, w6, w7 186 0x~~~~~~~~~~~~~~~~ 9b0afd28 mneg x8, x9, x10
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D | log-disasm | 185 0x~~~~~~~~~~~~~~~~ 1b07fcc5 mneg w5, w6, w7 186 0x~~~~~~~~~~~~~~~~ 9b0afd28 mneg x8, x9, x10
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D | log-cpufeatures-custom | 185 0x~~~~~~~~~~~~~~~~ 1b07fcc5 mneg w5, w6, w7 186 0x~~~~~~~~~~~~~~~~ 9b0afd28 mneg x8, x9, x10
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D | log-cpufeatures-colour | 185 0x~~~~~~~~~~~~~~~~ 1b07fcc5 mneg w5, w6, w7 186 0x~~~~~~~~~~~~~~~~ 9b0afd28 mneg x8, x9, x10
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D | log-cpufeatures | 185 0x~~~~~~~~~~~~~~~~ 1b07fcc5 mneg w5, w6, w7 186 0x~~~~~~~~~~~~~~~~ 9b0afd28 mneg x8, x9, x10
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 964 void mneg(const Register& rd, const Register& rn, const Register& rm);
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D | assembler-aarch64.cc | 912 void Assembler::mneg(const Register& rd, in mneg() function in vixl::aarch64::Assembler
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D | macro-assembler-aarch64.h | 2078 mneg(rd, rn, rm); in Mneg()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 789 def : MulAccumWAlias<"mneg", MSUBWrrr>; 790 def : MulAccumXAlias<"mneg", MSUBXrrr>;
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/external/capstone/arch/AArch64/ |
D | AArch64GenAsmWriter.inc | 10200 AsmString = "mneg $\x01, $\x02, $\x03"; 10214 AsmString = "mneg $\x01, $\x02, $\x03";
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 1913 void mneg(const Register& rd, const Register& rn, const Register& rm)
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1530 def : MulAccumWAlias<"mneg", MSUBWrrr>; 1531 def : MulAccumXAlias<"mneg", MSUBXrrr>;
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