/external/arm-trusted-firmware/plat/intel/soc/common/aarch64/ |
D | plat_helpers.S | 38 mov_imm x0, PLAT_SEC_ENTRY 40 mov_imm x2, PLAT_CPUID_RELEASE 73 mov_imm x1, PLAT_SEC_ENTRY 91 mov_imm x1, PLAT_SEC_ENTRY 105 mov_imm x0, PLAT_UART0_BASE 106 mov_imm x1, PLAT_UART_CLOCK 107 mov_imm x2, PLAT_BAUDRATE 119 mov_imm x1, PLAT_UART0_BASE 124 mov_imm x0, CRASH_CONSOLE_BASE
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/external/arm-trusted-firmware/plat/arm/board/fvp/include/ |
D | plat_macros.S | 24 mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID) 32 mov_imm x17, BASE_GICC_BASE 33 mov_imm x16, BASE_GICD_BASE 36 mov_imm x17, VE_GICC_BASE 37 mov_imm x16, VE_GICD_BASE
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/external/arm-trusted-firmware/plat/qemu/common/aarch64/ |
D | plat_helpers.S | 68 mov_imm x2, PLAT_QEMU_HOLD_BASE 80 mov_imm x0, PLAT_QEMU_TRUSTED_MAILBOX_BASE 106 mov_imm x0, PLAT_QEMU_CRASH_UART_BASE 107 mov_imm x1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ 108 mov_imm x2, PLAT_QEMU_CONSOLE_BAUDRATE 120 mov_imm x1, PLAT_QEMU_CRASH_UART_BASE 133 mov_imm x0, PLAT_QEMU_CRASH_UART_BASE
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/external/arm-trusted-firmware/plat/qemu/common/aarch32/ |
D | plat_helpers.S | 70 mov_imm r2, PLAT_QEMU_HOLD_BASE 83 mov_imm r0, PLAT_QEMU_TRUSTED_MAILBOX_BASE 109 mov_imm r0, PLAT_QEMU_CRASH_UART_BASE 110 mov_imm r1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ 111 mov_imm r2, PLAT_QEMU_CONSOLE_BAUDRATE 123 mov_imm r1, PLAT_QEMU_CRASH_UART_BASE 136 mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
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/external/arm-trusted-firmware/plat/hisilicon/poplar/aarch64/ |
D | poplar_helpers.S | 49 mov_imm x0, POPLAR_CRASH_UART_BASE 50 mov_imm x1, POPLAR_CRASH_UART_CLK_IN_HZ 51 mov_imm x2, POPLAR_CONSOLE_BAUDRATE 63 mov_imm x1, POPLAR_CRASH_UART_BASE 76 mov_imm x0, POPLAR_CRASH_UART_BASE
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/external/arm-trusted-firmware/plat/mediatek/mt6795/aarch64/ |
D | plat_helpers.S | 35 mov_imm x1, 0xdead1abf 105 mov_imm x0, UART0_BASE 106 mov_imm x1, UART_CLOCK 107 mov_imm x2, UART_BAUDRATE 120 mov_imm x1, UART0_BASE 134 mov_imm x0, UART0_BASE
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/external/arm-trusted-firmware/plat/amlogic/common/aarch64/ |
D | aml_helpers.S | 64 mov_imm x0, AML_UART0_AO_BASE 65 mov_imm x1, AML_UART0_AO_CLK_IN_HZ 66 mov_imm x2, AML_UART_BAUDRATE 76 mov_imm x1, AML_UART0_AO_BASE 87 mov_imm x0, AML_UART0_AO_BASE
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/external/arm-trusted-firmware/plat/arm/common/aarch64/ |
D | arm_helpers.S | 50 mov_imm x0, PLAT_ARM_CRASH_UART_BASE 51 mov_imm x1, PLAT_ARM_CRASH_UART_CLK_IN_HZ 52 mov_imm x2, ARM_CONSOLE_BAUDRATE 64 mov_imm x1, PLAT_ARM_CRASH_UART_BASE 77 mov_imm x0, PLAT_ARM_CRASH_UART_BASE
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/external/arm-trusted-firmware/lib/extensions/mtpmu/aarch64/ |
D | mtpmu.S | 29 mov_imm x1, ID_AA64DFR0_MTPMU_MASK 65 mov_imm x0, ID_AA64PFR0_EL3_SHIFT 71 mov_imm x1, MDCR_MTPME_BIT 85 mov_imm x0, ID_AA64PFR0_EL2_SHIFT 91 mov_imm x1, MDCR_EL2_MTPME
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/external/arm-trusted-firmware/plat/xilinx/zynqmp/aarch64/ |
D | zynqmp_helpers.S | 90 mov_imm x0, ZYNQMP_CRASH_UART_BASE 91 mov_imm x1, ZYNQMP_CRASH_UART_CLK_IN_HZ 92 mov_imm x2, ZYNQMP_UART_BAUDRATE 104 mov_imm x1, ZYNQMP_CRASH_UART_BASE 117 mov_imm x0, ZYNQMP_CRASH_UART_BASE
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/external/arm-trusted-firmware/plat/socionext/synquacer/ |
D | sq_helpers.S | 83 mov_imm x0, PLAT_SQ_BOOT_UART_BASE 84 mov_imm x1, PLAT_SQ_BOOT_UART_CLK_IN_HZ 85 mov_imm x2, SQ_CONSOLE_BAUDRATE 96 mov_imm x1, PLAT_SQ_BOOT_UART_BASE 108 mov_imm x0, PLAT_SQ_BOOT_UART_BASE
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/external/arm-trusted-firmware/plat/arm/board/juno/aarch64/ |
D | juno_helpers.S | 159 mov_imm x0, (V2M_SYSREGS_BASE + V2M_SYS_ID) 216 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE 229 mov_imm \_reg_d, (0xe3000000 | \ 239 mov_imm \_reg_d, (0xe3400000 | \ 264 mov_imm w2, 0xe12fff10 267 mov_imm x3, HI_VECTOR_BASE
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/external/arm-trusted-firmware/plat/ti/k3/common/ |
D | k3_helpers.S | 123 mov_imm x0, CRASH_CONSOLE_BASE 124 mov_imm x1, CRASH_CONSOLE_CLK 125 mov_imm x2, CRASH_CONSOLE_BAUD_RATE 139 mov_imm x1, CRASH_CONSOLE_BASE 153 mov_imm x0, CRASH_CONSOLE_BASE
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/external/arm-trusted-firmware/plat/imx/imx7/common/ |
D | imx7_helpers.S | 38 mov_imm r0, PLAT_IMX7_BOOT_UART_BASE 39 mov_imm r1, PLAT_IMX7_BOOT_UART_CLK_IN_HZ 40 mov_imm r2, PLAT_IMX7_CONSOLE_BAUDRATE 45 mov_imm r1, PLAT_IMX7_BOOT_UART_BASE
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/external/arm-trusted-firmware/plat/allwinner/common/ |
D | plat_helpers.S | 20 mov_imm x0, SUNXI_UART0_BASE 21 mov_imm x1, SUNXI_UART0_CLK_IN_HZ 22 mov_imm x2, SUNXI_UART0_BAUDRATE 27 mov_imm x1, SUNXI_UART0_BASE
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/external/arm-trusted-firmware/plat/arm/board/fvp/aarch64/ |
D | fvp_helpers.S | 41 mov_imm x1, PWRC_BASE 54 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE 92 mov_imm x1, PWRC_BASE 112 mov_imm x0, PLAT_ARM_TRUSTED_MAILBOX_BASE 135 mov_imm x1, MPIDR_AFFINITY_MASK
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/external/arm-trusted-firmware/plat/rpi/common/aarch64/ |
D | plat_helpers.S | 81 mov_imm x2, PLAT_RPI3_TM_HOLD_BASE 99 mov_imm x0, PLAT_RPI3_TM_ENTRYPOINT 139 mov_imm x0, PLAT_RPI3_TM_HOLD_BASE 167 mov_imm x0, PLAT_RPI_MINI_UART_BASE 181 mov_imm x1, PLAT_RPI_MINI_UART_BASE 194 mov_imm x0, PLAT_RPI_MINI_UART_BASE
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/external/arm-trusted-firmware/plat/brcm/board/stingray/aarch64/ |
D | plat_helpers.S | 115 mov_imm x1, SECONDARY_CPU_SPIN_BASE_ADDR 163 mov_imm x0, BRCM_CRASH_CONSOLE_BASE 164 mov_imm x1, BRCM_CRASH_CONSOLE_REFCLK 165 mov_imm x2, BRCM_CRASH_CONSOLE_BAUDRATE 179 mov_imm x1, BRCM_CRASH_CONSOLE_BASE 191 mov_imm x0, BRCM_CRASH_CONSOLE_BASE
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/external/arm-trusted-firmware/plat/hisilicon/hikey/aarch64/ |
D | hikey_helpers.S | 46 mov_imm x0, CRASH_CONSOLE_BASE 47 mov_imm x1, PL011_UART_CLK_IN_HZ 48 mov_imm x2, PL011_BAUDRATE 60 mov_imm x1, CRASH_CONSOLE_BASE 73 mov_imm x0, CRASH_CONSOLE_BASE
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/external/arm-trusted-firmware/plat/mediatek/mt8183/include/ |
D | plat_macros.S | 35 mov_imm x26, BASE_GICD_BASE 36 mov_imm x27, BASE_GICC_BASE 69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \ 73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
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/external/arm-trusted-firmware/plat/mediatek/mt8173/include/ |
D | plat_macros.S | 35 mov_imm x16, BASE_GICD_BASE 36 mov_imm x17, BASE_GICC_BASE 69 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \ 73 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
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/external/arm-trusted-firmware/plat/mediatek/mt6795/include/ |
D | plat_macros.S | 29 mov_imm x16, BASE_GICD_BASE 30 mov_imm x17, BASE_GICC_BASE 76 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \ 80 mov_imm x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET( \
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/external/arm-trusted-firmware/plat/hisilicon/hikey960/include/ |
D | plat_macros.S | 36 mov_imm x16, GICD_REG_BASE 37 mov_imm x17, GICC_REG_BASE 67 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \ 71 mov_imm x7, (CCI400_REG_BASE + SLAVE_IFACE_OFFSET( \
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/external/arm-trusted-firmware/plat/hisilicon/hikey/include/ |
D | plat_macros.S | 36 mov_imm x16, PLAT_ARM_GICD_BASE 37 mov_imm x17, PLAT_ARM_GICC_BASE 67 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \ 71 mov_imm x7, (CCI400_BASE + SLAVE_IFACE_OFFSET( \
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/external/arm-trusted-firmware/plat/renesas/common/include/ |
D | plat_macros.S | 31 mov_imm x17, RCAR_GICC_BASE 32 mov_imm x16, RCAR_GICD_BASE 76 mov_imm x7, (CCI500_BASE + SLAVE_IFACE3_OFFSET) 79 mov_imm x7, (CCI500_BASE + SLAVE_IFACE4_OFFSET)
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