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Searched refs:movsd (Results 1 – 25 of 367) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/X86/
Dmasked-iv-unsafe.ll11 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
12 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
13 ; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
18 ; CHECK-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
20 ; CHECK-NEXT: movsd %xmm3, (%rdi,%rcx,8)
23 ; CHECK-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
25 ; CHECK-NEXT: movsd %xmm3, (%rdi,%rcx,8)
26 ; CHECK-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
28 ; CHECK-NEXT: movsd %xmm3, (%rdi,%rax,8)
64 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
[all …]
Dmasked-iv-safe.ll11 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
12 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
13 ; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
17 ; CHECK-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
21 ; CHECK-NEXT: movsd %xmm3, 80(%rdi,%rax)
57 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
58 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
59 ; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
63 ; CHECK-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
67 ; CHECK-NEXT: movsd %xmm3, (%rdi,%rax)
[all …]
Dcfguard-x86-vectorcall.ll19 ; X32: movsd 24(%eax), %xmm4 # xmm4 = mem[0],zero
20 ; X32: movsd %xmm4, 24(%esp)
21 ; X32: movsd 16(%eax), %xmm5 # xmm5 = mem[0],zero
22 ; X32: movsd %xmm5, 16(%esp)
23 ; X32: movsd (%eax), %xmm6 # xmm6 = mem[0],zero
24 ; X32: movsd 8(%eax), %xmm7 # xmm7 = mem[0],zero
25 ; X32: movsd %xmm7, 8(%esp)
26 ; X32: movsd %xmm6, (%esp)
Dvolatile.ll10 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
12 ; CHECK-NEXT: movsd %xmm0, x
13 ; CHECK-NEXT: movsd %xmm0, x
14 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
26 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Dpr3457.ll14 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
15 ; CHECK-NEXT: movsd %xmm0, (%esp) ## 8-byte Spill
18 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
19 ; CHECK-NEXT: movsd (%esp), %xmm1 ## 8-byte Reload
24 ; CHECK-NEXT: movsd %xmm0, (%esi)
Dmemcpy-2.ll15 ; SSE2-Darwin: movsd _.str+16, %xmm0
16 ; SSE2-Darwin: movsd %xmm0, 16(%esp)
22 ; SSE2-Mingw32: movsd _.str+16, %xmm0
23 ; SSE2-Mingw32: movsd %xmm0, 16(%esp)
96 ; SSE2-Darwin: movsd (%ecx), %xmm0
97 ; SSE2-Darwin: movsd 8(%ecx), %xmm1
98 ; SSE2-Darwin: movsd %xmm1, 8(%eax)
99 ; SSE2-Darwin: movsd %xmm0, (%eax)
102 ; SSE2-Mingw32: movsd (%ecx), %xmm0
103 ; SSE2-Mingw32: movsd 8(%ecx), %xmm1
[all …]
D2008-06-13-VolatileLoadStore.ll12 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
13 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
14 ; CHECK-NEXT: movsd %xmm1, atomic
16 ; CHECK-NEXT: movsd %xmm1, atomic2
17 ; CHECK-NEXT: movsd %xmm0, anything
Dlsr-static-addr.ll14 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
18 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
20 ; CHECK-NEXT: movsd %xmm1, A(,%rax,8)
33 ; ATOM-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
37 ; ATOM-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
39 ; ATOM-NEXT: movsd %xmm1, A(,%rax,8)
Dpr34080.ll26 ; SSE2-NEXT: movsd %xmm0, -64(%rbp)
27 ; SSE2-NEXT: movsd %xmm0, -32(%rbp)
41 ; SSE2-NEXT: movsd %xmm0, -56(%rbp)
42 ; SSE2-NEXT: movsd %xmm0, -24(%rbp)
65 ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -64(%rbp)
66 ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -32(%rbp)
80 ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -56(%rbp)
81 ; SSE2-SCHEDULE-NEXT: movsd %xmm0, -24(%rbp)
99 ; SSE3-NEXT: movsd %xmm0, -48(%rbp)
100 ; SSE3-NEXT: movsd %xmm0, -24(%rbp)
[all …]
Dpr3154.ll32 …call void asm sideeffect "movsd $0, %xmm7 \0A\09movapd ff_pd_1, %xmm6 \0…
84 …movsd ff_pd_1, %xmm0 \0A\09movsd ff_pd_1, %xmm1 \0A\09movsd ff_pd_1, %xmm2 \0A\091: …
92 …movsd ff_pd_1, %xmm0 \0A\09movsd ff_pd_1, %xmm1 \0A\091: \0A…
Dcfguard-x86-64-vectorcall.ll22 ; X64: movsd 32(%rsp), %xmm0 # xmm0 = mem[0],zero
23 ; X64: movsd 40(%rsp), %xmm1 # xmm1 = mem[0],zero
24 ; X64: movsd 48(%rsp), %xmm2 # xmm2 = mem[0],zero
25 ; X64: movsd 56(%rsp), %xmm3 # xmm3 = mem[0],zero
Dvec_i64.ll11 ; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
16 ; X64-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
30 ; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
35 ; X64-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Dmerge_store_duplicated_loads.ll10 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
11 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
12 ; CHECK-NEXT: movsd %xmm0, (%rdi)
13 ; CHECK-NEXT: movsd %xmm1, 8(%rdi)
14 ; CHECK-NEXT: movsd %xmm0, 16(%rdi)
15 ; CHECK-NEXT: movsd %xmm1, 24(%rdi)
Dstack-align.ll26 ; CHECK: movsd {{.*}}G, %xmm{{.*}}
28 ; CHECK: movsd 4(%esp), %xmm{{.*}}
79 ; CHECK: movsd
80 ; CHECK-NEXT: movsd
81 ; CHECK-NEXT: movsd
82 ; CHECK-NEXT: movsd
Dvector-constrained-fp-intrinsics.ll89 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
91 ; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)
184 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
185 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
188 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
189 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
283 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
284 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
286 ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
287 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
[all …]
Dpr44749.ll9 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
10 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
21 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
27 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
/external/libffi/src/x86/
Dwin64_intel.S67 movsd XMM0, qword ptr [RSP] ; movsd (%rsp), %xmm0
69 movsd XMM1, qword ptr [RSP + 8]; movsd 8(%rsp), %xmm1
71 movsd XMM2, qword ptr [RSP + 16] ; movsd 16(%rsp), %xmm2
73 movsd XMM3, qword ptr [RSP + 24] ;movsd 24(%rsp), %xmm3
108 movsd qword ptr[r8], xmm0; movsd %xmm0, (%r8)
213 movsd qword ptr [ffi_clo_OFF_X + rsp], xmm0 ; movsd %xmm0, ffi_clo_OFF_X(%rsp)
214 movsd qword ptr [ffi_clo_OFF_X+8+rsp], xmm1 ; movsd %xmm1, ffi_clo_OFF_X+8(%rsp)
215 movsd qword ptr [ffi_clo_OFF_X+16+rsp], xmm2 ; movsd %xmm2, ffi_clo_OFF_X+16(%rsp)
216 movsd qword ptr [ffi_clo_OFF_X+24+rsp], xmm3 ; movsd %xmm3, ffi_clo_OFF_X+24(%rsp)
224 movsd xmm0, qword ptr [rsp + ffi_clo_OFF_R] ;movsd ffi_clo_OFF_R(%rsp), %xmm0
Dwin64.S67 movsd (%rsp), %xmm0
69 movsd 8(%rsp), %xmm1
71 movsd 16(%rsp), %xmm2
73 movsd 24(%rsp), %xmm3
108 movsd %xmm0, (%r8)
215 movsd %xmm0, ffi_clo_OFF_X(%rsp)
216 movsd %xmm1, ffi_clo_OFF_X+8(%rsp)
217 movsd %xmm2, ffi_clo_OFF_X+16(%rsp)
218 movsd %xmm3, ffi_clo_OFF_X+24(%rsp)
225 movsd ffi_clo_OFF_R(%rsp), %xmm0
/external/llvm/test/CodeGen/X86/
Dlsr-static-addr.ll5 ; CHECK: movsd .LCPI0_0(%rip), %xmm0
8 ; CHECK-NEXT: movsd A(,%rax,8)
10 ; CHECK-NEXT: movsd
14 ; ATOM: movsd .LCPI0_0(%rip), %xmm0
18 ; ATOM-NEXT: movsd A(,%rax,8)
20 ; ATOM-NEXT: movsd
Dmemcpy-2.ll15 ; SSE2-Darwin: movsd _.str+16, %xmm0
16 ; SSE2-Darwin: movsd %xmm0, 16(%esp)
22 ; SSE2-Mingw32: movsd _.str+16, %xmm0
23 ; SSE2-Mingw32: movsd %xmm0, 16(%esp)
96 ; SSE2-Darwin: movsd (%ecx), %xmm0
97 ; SSE2-Darwin: movsd 8(%ecx), %xmm1
98 ; SSE2-Darwin: movsd %xmm1, 8(%eax)
99 ; SSE2-Darwin: movsd %xmm0, (%eax)
102 ; SSE2-Mingw32: movsd (%ecx), %xmm0
103 ; SSE2-Mingw32: movsd 8(%ecx), %xmm1
[all …]
Dlower-bitcast.ll16 ; CHECK-NOT: movsd
23 ; CHECK-WIDE-NOT: movsd
36 ; CHECK-NOT: movsd
41 ; CHECK-WIDE-NOT: movsd
113 ; CHECK-NOT: movsd
134 ; CHECK-NOT: movsd
140 ; CHECK-WIDE-NOT: movsd
157 ; CHECK-NOT: movsd
164 ; CHECK-WIDE-NOT: movsd
178 ; CHECK-NOT: movsd
[all …]
Dpr3154.ll32 …call void asm sideeffect "movsd $0, %xmm7 \0A\09movapd ff_pd_1, %xmm6 \0…
84 …movsd ff_pd_1, %xmm0 \0A\09movsd ff_pd_1, %xmm1 \0A\09movsd ff_pd_1, %xmm2 \0A\091: …
92 …movsd ff_pd_1, %xmm0 \0A\09movsd ff_pd_1, %xmm1 \0A\091: \0A…
Dstack-align.ll26 ; CHECK: movsd {{.*}}G, %xmm{{.*}}
28 ; CHECK: movsd 4(%esp), %xmm{{.*}}
79 ; CHECK: movsd
80 ; CHECK-NEXT: movsd
81 ; CHECK-NEXT: movsd
82 ; CHECK-NEXT: movsd
/external/llvm-project/llvm/test/tools/llvm-mca/X86/Barcelona/
Dclear-super-register-2.s4 # movss/movsd explicitly zeroes out the high bits of xmm,
16 movsd (%eax), %xmm0 label
93 # CHECK-NEXT: 1 6 0.50 * movsd (%eax), %xmm0
101 # CHECK-NEXT: [0,1] DeeeeeeE---------------R . . . . . . . . . movsd …
104 # CHECK-NEXT: [1,1] .DeeeeeeE-----------------------------------R. . . . . movsd …
107 # CHECK-NEXT: [2,1] .DeeeeeeE--------------------------------------------------------R movsd …
118 # CHECK-NEXT: 1. 3 1.0 1.0 35.3 movsd (%eax), %xmm0
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BdVer2/
Dclear-super-register-3.s4 # movss/movsd explicitly zeroes out the high bits of xmm,
16 movsd (%eax), %xmm0 label
90 # CHECK-NEXT: 1 5 1.50 * movsd (%eax), %xmm0
98 # CHECK-NEXT: [0,1] DeeeeeE-----R . . . movsd (%eax), %xmm0
101 # CHECK-NEXT: [1,1] .D==eeeeeE------------R movsd (%eax), %xmm0
112 # CHECK-NEXT: 1. 2 2.0 2.0 8.5 movsd (%eax), %xmm0

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