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Searched refs:mt_layer (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_clear.c189 layer >= depth_irb->mt_layer && in brw_fast_clear_depth()
190 layer < depth_irb->mt_layer + num_layers) { in brw_fast_clear_depth()
224 depth_irb->mt_layer + a); in brw_fast_clear_depth()
228 depth_irb->mt_layer + a, 1, in brw_fast_clear_depth()
234 depth_irb->mt_layer, num_layers, in brw_fast_clear_depth()
Dintel_fbo.c170 intel_miptree_map(brw, mt, irb->mt_level, irb->mt_layer, in intel_map_renderbuffer()
218 intel_miptree_unmap(brw, mt, irb->mt_level, irb->mt_layer); in intel_unmap_renderbuffer()
548 irb->mt_layer = layer; in intel_renderbuffer_update_wrapper()
575 irb->mt_layer, in intel_renderbuffer_set_draw_offset()
695 depthRb->mt_layer != stencilRb->mt_layer) { in intel_validate_framebuffer()
707 depthRb->mt_layer != stencilRb->mt_layer) { in intel_validate_framebuffer()
712 depthRb->mt_layer, in intel_validate_framebuffer()
714 stencilRb->mt_layer); in intel_validate_framebuffer()
872 src_irb->mt_level, src_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
875 dst_irb->mt_level, dst_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
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Dbrw_blorp.c597 src_mt, src_irb->mt_level, src_irb->mt_layer, in do_blorp_blit()
599 dst_mt, dst_irb->mt_level, dst_irb->mt_layer, in do_blorp_blit()
764 src_mt, src_irb->mt_level, src_irb->mt_layer, in brw_blorp_copytexsubimage()
790 src_mt, src_irb->mt_level, src_irb->mt_layer, in brw_blorp_copytexsubimage()
1257 if (irb->layer_count > 1 || irb->mt_level || irb->mt_layer) in do_single_blorp_clear()
1275 intel_miptree_get_aux_state(irb->mt, irb->mt_level, irb->mt_layer); in do_single_blorp_clear()
1289 irb->mt, irb->mt_level, irb->mt_layer, num_layers); in do_single_blorp_clear()
1294 &level, irb->mt_layer, num_layers); in do_single_blorp_clear()
1314 level, irb->mt_layer, num_layers, x0, y0, x1, y1); in do_single_blorp_clear()
1324 irb->mt_layer, num_layers, in do_single_blorp_clear()
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Dintel_pixel_read.c152 intel_miptree_access_raw(brw, irb->mt, irb->mt_level, irb->mt_layer, false); in intel_readpixels_tiled_memcpy()
168 intel_miptree_get_image_offset(irb->mt, irb->mt_level, irb->mt_layer, in intel_readpixels_tiled_memcpy()
250 irb->mt_level, x, y, irb->mt_layer, in intel_readpixels_blorp()
Dintel_fbo.h94 unsigned int mt_layer; member
217 return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer, in intel_renderbuffer_get_tile_offsets()
Dintel_pixel_copy.c172 read_irb->mt, read_irb->mt_level, read_irb->mt_layer, in do_blit_copypixels()
174 draw_irb->mt, draw_irb->mt_level, draw_irb->mt_layer, in do_blit_copypixels()
Dbrw_draw.c638 depth_irb->mt_layer, in brw_predraw_resolve_framebuffer()
660 irb->mt_layer, irb->layer_count, in brw_predraw_resolve_framebuffer()
688 irb->mt_layer, irb->layer_count, in brw_predraw_resolve_framebuffer()
735 depth_irb->mt_layer, in brw_postdraw_set_buffers_need_resolve()
741 depth_irb->mt_layer, 1, in brw_postdraw_set_buffers_need_resolve()
754 stencil_irb->mt_layer, in brw_postdraw_set_buffers_need_resolve()
773 irb->mt_layer, irb->layer_count, in brw_postdraw_set_buffers_need_resolve()
789 irb->Base.Base.TexImage->Level, irb->mt_layer); in intel_renderbuffer_move_temp_back()
Dbrw_misc_state.c248 assert(stencil_irb->mt_layer == depth_irb->mt_layer); in brw_workaround_depthstencil_alignment()
381 view.base_array_layer = depth_irb->mt_layer; in brw_emit_depthbuffer()
426 view.base_array_layer = stencil_irb->mt_layer; in brw_emit_depthbuffer()
Dintel_pixel_draw.c129 irb->mt, irb->mt_level, irb->mt_layer, in do_blit_drawpixels()
Dintel_pixel_bitmap.c259 intel_miptree_access_raw(brw, irb->mt, irb->mt_level, irb->mt_layer, true); in do_blit_bitmap()
Dbrw_wm_surface_state.c252 .base_array_layer = irb->mt_layer, in gen6_update_renderbuffer_surface()
1114 .base_array_layer = irb->mt_layer, in update_renderbuffer_read_surfaces()
Dbrw_context.c1402 assert(rb->mt_layer == 0 && rb->mt_level == 0 && in intel_resolve_for_dri2_flush()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_fbo.c120 intel_miptree_map(intel, irb->mt, irb->mt_level, irb->mt_layer, in intel_map_renderbuffer()
156 intel_miptree_unmap(intel, irb->mt, irb->mt_level, irb->mt_layer); in intel_unmap_renderbuffer()
442 irb->mt_layer = layer; in intel_renderbuffer_update_wrapper()
459 irb->mt_layer, in intel_renderbuffer_set_draw_offset()
579 depthRb->mt_layer != stencilRb->mt_layer) { in intel_validate_framebuffer()
584 depthRb->mt_layer, in intel_validate_framebuffer()
586 stencilRb->mt_layer); in intel_validate_framebuffer()
717 src_irb->mt_level, src_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
720 dst_irb->mt_level, dst_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
Dintel_fbo.h65 unsigned int mt_layer; member
150 return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer, in intel_renderbuffer_get_tile_offsets()
Dintel_pixel_copy.c170 read_irb->mt, read_irb->mt_level, read_irb->mt_layer, in do_blit_copypixels()
172 draw_irb->mt, draw_irb->mt_level, draw_irb->mt_layer, in do_blit_copypixels()
Dintel_tex_copy.c68 irb->mt, irb->mt_level, irb->mt_layer, in intel_copy_texsubimage()
Dintel_pixel_read.c140 irb->mt, irb->mt_level, irb->mt_layer, in do_blit_readpixels()