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Searched refs:mt_level (Results 1 – 18 of 18) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_clear.c157 depth_irb->mt_level - mt->first_level) % 16) != 0) in brw_fast_clear_depth()
188 if (level == depth_irb->mt_level && in brw_fast_clear_depth()
223 intel_miptree_get_aux_state(mt, depth_irb->mt_level, in brw_fast_clear_depth()
227 intel_hiz_exec(brw, mt, depth_irb->mt_level, in brw_fast_clear_depth()
233 intel_miptree_set_aux_state(brw, mt, depth_irb->mt_level, in brw_fast_clear_depth()
Dintel_fbo.c170 intel_miptree_map(brw, mt, irb->mt_level, irb->mt_layer, in intel_map_renderbuffer()
218 intel_miptree_unmap(brw, mt, irb->mt_level, irb->mt_layer); in intel_unmap_renderbuffer()
547 irb->mt_level = level; in intel_renderbuffer_update_wrapper()
574 irb->mt_level, in intel_renderbuffer_set_draw_offset()
694 depthRb->mt_level != stencilRb->mt_level || in intel_validate_framebuffer()
706 if (depthRb->mt_level != stencilRb->mt_level || in intel_validate_framebuffer()
711 depthRb->mt_level, in intel_validate_framebuffer()
713 stencilRb->mt_level, in intel_validate_framebuffer()
872 src_irb->mt_level, src_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
875 dst_irb->mt_level, dst_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
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Dintel_pixel_read.c152 intel_miptree_access_raw(brw, irb->mt, irb->mt_level, irb->mt_layer, false); in intel_readpixels_tiled_memcpy()
168 intel_miptree_get_image_offset(irb->mt, irb->mt_level, irb->mt_layer, in intel_readpixels_tiled_memcpy()
250 irb->mt_level, x, y, irb->mt_layer, in intel_readpixels_blorp()
Dintel_fbo.h93 unsigned int mt_level; member
217 return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer, in intel_renderbuffer_get_tile_offsets()
Dbrw_misc_state.c145 assert(!intel_miptree_level_has_hiz(irb->mt, irb->mt_level)); in rebase_depth_stencil()
165 irb->mt_level, tile_x, tile_y); in rebase_depth_stencil()
247 assert(stencil_irb->mt_level == depth_irb->mt_level); in brw_workaround_depthstencil_alignment()
380 view.base_level = depth_irb->mt_level - depth_irb->mt->first_level; in brw_emit_depthbuffer()
425 view.base_level = stencil_irb->mt_level - stencil_irb->mt->first_level; in brw_emit_depthbuffer()
Dbrw_blorp.c597 src_mt, src_irb->mt_level, src_irb->mt_layer, in do_blorp_blit()
599 dst_mt, dst_irb->mt_level, dst_irb->mt_layer, in do_blorp_blit()
764 src_mt, src_irb->mt_level, src_irb->mt_layer, in brw_blorp_copytexsubimage()
790 src_mt, src_irb->mt_level, src_irb->mt_layer, in brw_blorp_copytexsubimage()
1257 if (irb->layer_count > 1 || irb->mt_level || irb->mt_layer) in do_single_blorp_clear()
1260 unsigned level = irb->mt_level; in do_single_blorp_clear()
1275 intel_miptree_get_aux_state(irb->mt, irb->mt_level, irb->mt_layer); in do_single_blorp_clear()
1289 irb->mt, irb->mt_level, irb->mt_layer, num_layers); in do_single_blorp_clear()
1323 intel_miptree_set_aux_state(brw, irb->mt, irb->mt_level, in do_single_blorp_clear()
1328 irb->mt, irb->mt_level, irb->mt_layer, num_layers); in do_single_blorp_clear()
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Dintel_pixel_copy.c172 read_irb->mt, read_irb->mt_level, read_irb->mt_layer, in do_blit_copypixels()
174 draw_irb->mt, draw_irb->mt_level, draw_irb->mt_layer, in do_blit_copypixels()
Dbrw_draw.c398 irb->mt_level >= min_level && in intel_disable_rb_aux_buffer()
399 irb->mt_level < min_level + num_levels) { in intel_disable_rb_aux_buffer()
637 depth_irb->mt_level, in brw_predraw_resolve_framebuffer()
659 irb->mt_level, 1, in brw_predraw_resolve_framebuffer()
687 intel_miptree_prepare_render(brw, irb->mt, irb->mt_level, in brw_predraw_resolve_framebuffer()
734 depth_irb->mt_level, in brw_postdraw_set_buffers_need_resolve()
740 depth_irb->mt_level, in brw_postdraw_set_buffers_need_resolve()
753 intel_miptree_finish_write(brw, stencil_mt, stencil_irb->mt_level, in brw_postdraw_set_buffers_need_resolve()
772 intel_miptree_finish_render(brw, irb->mt, irb->mt_level, in brw_postdraw_set_buffers_need_resolve()
Dintel_pixel_draw.c129 irb->mt, irb->mt_level, irb->mt_layer, in do_blit_drawpixels()
Dintel_tex_image.c139 const unsigned mt_level = tex_image->Level + tex_image->TexObject->MinLevel; in intel_texsubimage_blorp() local
148 mt_level, x, y, mt_z, width, height, depth, in intel_texsubimage_blorp()
705 const unsigned mt_level = tex_image->Level + tex_image->TexObject->MinLevel; in intel_gettexsubimage_blorp() local
715 mt_level, x, y, mt_z, in intel_gettexsubimage_blorp()
Dintel_pixel_bitmap.c259 intel_miptree_access_raw(brw, irb->mt, irb->mt_level, irb->mt_layer, true); in do_blit_bitmap()
Dbrw_wm_surface_state.c250 .base_level = irb->mt_level - irb->mt->first_level, in gen6_update_renderbuffer_surface()
1112 .base_level = irb->mt_level - irb->mt->first_level, in update_renderbuffer_read_surfaces()
Dbrw_context.c1402 assert(rb->mt_layer == 0 && rb->mt_level == 0 && in intel_resolve_for_dri2_flush()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_fbo.c120 intel_miptree_map(intel, irb->mt, irb->mt_level, irb->mt_layer, in intel_map_renderbuffer()
156 intel_miptree_unmap(intel, irb->mt, irb->mt_level, irb->mt_layer); in intel_unmap_renderbuffer()
441 irb->mt_level = level; in intel_renderbuffer_update_wrapper()
458 irb->mt_level, in intel_renderbuffer_set_draw_offset()
578 if (depthRb->mt_level != stencilRb->mt_level || in intel_validate_framebuffer()
583 depthRb->mt_level, in intel_validate_framebuffer()
585 stencilRb->mt_level, in intel_validate_framebuffer()
717 src_irb->mt_level, src_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
720 dst_irb->mt_level, dst_irb->mt_layer, in intel_blit_framebuffer_with_blitter()
Dintel_fbo.h64 unsigned int mt_level; member
150 return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer, in intel_renderbuffer_get_tile_offsets()
Dintel_pixel_copy.c170 read_irb->mt, read_irb->mt_level, read_irb->mt_layer, in do_blit_copypixels()
172 draw_irb->mt, draw_irb->mt_level, draw_irb->mt_layer, in do_blit_copypixels()
Dintel_tex_copy.c68 irb->mt, irb->mt_level, irb->mt_layer, in intel_copy_texsubimage()
Dintel_pixel_read.c140 irb->mt, irb->mt_level, irb->mt_layer, in do_blit_readpixels()