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Searched refs:mthc1 (Results 1 – 25 of 126) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/
Dbitcast.ll12 define double @mthc1(i64 %a) {
13 ; MIPS32R2: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D32
14 ; MIPS32FP64: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64
15 ; MM: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D32_MM
16 ; MMFP64: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64_MM
17 ; MMR6: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64_MM
/external/llvm/test/CodeGen/Mips/
Dfpxx.ll38 ; 32R2-NOFPXX: mthc1 $5, $f0
41 ; 32R2-FPXX: mthc1 $5, $f0
63 ; 32R2-NOFPXX: mthc1 $7, $f0
66 ; 32R2-FPXX: mthc1 $7, $f0
87 ; 32R2-NOFPXX: mthc1 $7, $f0
90 ; 32R2-FPXX: mthc1 $7, $f0
111 ; 32R2-NOFPXX: mthc1 $7, $f0
114 ; 32R2-FPXX: mthc1 $7, $f0
135 ; 32R2-NOFPXX: mthc1 $zero, $f0
138 ; 32R2-FPXX: mthc1 $zero, $f0
[all …]
Dfp64a.ll35 ; 32R2-NO-FP64A-LE: mthc1 $5, $f0
39 ; 32R2-NO-FP64A-BE: mthc1 $4, $f0
56 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
59 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
76 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
79 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
96 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
99 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
117 ; 32R2-NO-FP64A-LE-DAG: mthc1 $5, $[[T0:f[0-9]+]]
119 ; 32R2-NO-FP64A-LE-DAG: mthc1 $7, $[[T1:f[0-9]+]]
[all …]
Dmno-ldc1-sdc1.ll74 ; 32R2-LE-PIC-DAG: mthc1 $[[R1]], $f0
79 ; 32R6-LE-PIC-DAG: mthc1 $[[R1]], $f0
93 ; 32R2-LE-STATIC-DAG: mthc1 $[[R3]], $f0
100 ; 32R6-LE-STATIC-DAG: mthc1 $[[R3]], $f0
110 ; 32R2-BE-PIC-DAG: mthc1 $[[R0]], $f0
115 ; 32R6-BE-PIC-DAG: mthc1 $[[R0]], $f0
136 ; MM-MNO-LE-PIC: mthc1 $[[R5]], $f0
138 ; MM-MNO-BE-PIC: mthc1 $[[R4]], $f0
248 ; 32R2-DAG: mthc1 $[[R1]], $f0
255 ; 32R6-DAG: mthc1 $[[R1]], $f0
[all …]
D2013-11-18-fp64-const0.ll18 ; FIXME: A redundant mthc1 is currently emitted. Add a -NOT when it is
Dbuildpairextractelementf64.ll16 ; HAS-MFHC1-DAG: mthc1
Dfcopysign.ll20 ; 32R2: mthc1 $[[INS]], $f0
/external/llvm-project/llvm/test/CodeGen/Mips/
Dfpxx.ll38 ; 32R2-NOFPXX: mthc1 $5, $f0
41 ; 32R2-FPXX: mthc1 $5, $f0
63 ; 32R2-NOFPXX: mthc1 $7, $f0
66 ; 32R2-FPXX: mthc1 $7, $f0
87 ; 32R2-NOFPXX: mthc1 $7, $f0
90 ; 32R2-FPXX: mthc1 $7, $f0
111 ; 32R2-NOFPXX: mthc1 $7, $f0
114 ; 32R2-FPXX: mthc1 $7, $f0
135 ; 32R2-NOFPXX: mthc1 $zero, $f0
138 ; 32R2-FPXX: mthc1 $zero, $f0
[all …]
Dfp64a.ll33 ; 32R2-NO-FP64A-LE: mthc1 $5, $f0
37 ; 32R2-NO-FP64A-BE: mthc1 $4, $f0
54 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
57 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
74 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
77 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
94 ; 32R2-NO-FP64A-LE: mthc1 $7, $f0
97 ; 32R2-NO-FP64A-BE: mthc1 $6, $f0
115 ; 32R2-NO-FP64A-LE-DAG: mthc1 $5, $[[T0:f[0-9]+]]
117 ; 32R2-NO-FP64A-LE-DAG: mthc1 $7, $[[T1:f[0-9]+]]
[all …]
Dmno-ldc1-sdc1.ll74 ; 32R2-LE-PIC-DAG: mthc1 $[[R1]], $f0
79 ; 32R6-LE-PIC-DAG: mthc1 $[[R1]], $f0
93 ; 32R2-LE-STATIC-DAG: mthc1 $[[R3]], $f0
100 ; 32R6-LE-STATIC-DAG: mthc1 $[[R3]], $f0
110 ; 32R2-BE-PIC-DAG: mthc1 $[[R0]], $f0
115 ; 32R6-BE-PIC-DAG: mthc1 $[[R0]], $f0
136 ; MM-MNO-LE-PIC-DAG: mthc1 $[[R5]], $f0
138 ; MM-MNO-BE-PIC-DAG: mthc1 $[[R4]], $f0
248 ; 32R2-DAG: mthc1 $[[R1]], $f0
255 ; 32R6-DAG: mthc1 $[[R1]], $f0
[all …]
D2013-11-18-fp64-const0.ll12 ; FIXME: A redundant mthc1 is currently emitted.
40 ; CHECK-FP64-NEXT: mthc1 $zero, $f1
Dmicromips-mtc-mfc.ll12 ; MM2-NEXT: mthc1 $zero, $f2 # encoding: [0x54,0x02,0x38,0x3b]
28 ; MM6-NEXT: mthc1 $zero, $f1 # encoding: [0x54,0x01,0x38,0x3b]
Dbuildpairextractelementf64.ll16 ; HAS-MFHC1-DAG: mthc1
Danalyzebranch.ll35 ; MIPS32R2-NEXT: mthc1 $zero, $f2
41 ; MIPS32R2-NEXT: mthc1 $zero, $f0
56 ; MIPS32r6-NEXT: mthc1 $zero, $f1
63 ; MIPS32r6-NEXT: mthc1 $zero, $f0
Dfcopysign.ll25 ; 32R2: mthc1 $[[INS]], $f0
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/
Dsitofp_and_uitofp.ll159 ; FP64-NEXT: mthc1 $1, $f0
163 ; FP64-NEXT: mthc1 $2, $f1
194 ; FP64-NEXT: mthc1 $2, $f0
198 ; FP64-NEXT: mthc1 $2, $f1
229 ; FP64-NEXT: mthc1 $2, $f0
233 ; FP64-NEXT: mthc1 $2, $f1
279 ; FP64-NEXT: mthc1 $1, $f0
283 ; FP64-NEXT: mthc1 $2, $f1
312 ; FP64-NEXT: mthc1 $2, $f0
316 ; FP64-NEXT: mthc1 $2, $f1
[all …]
Dfloat_constants.ll36 ; FP64-NEXT: mthc1 $2, $f0
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-fp64.txt8 0x54 0x80 0x38 0x3b # CHECK: mthc1 $4, $f0
26 0x54 0x86 0x38 0x3b # CHECK: mthc1 $4, $f6
Dvalid-fp64-el.txt8 0x80 0x54 0x3b 0x38 # CHECK: mthc1 $4, $f0
26 0x86 0x54 0x3b 0x38 # CHECK: mthc1 $4, $f6
/external/llvm-project/llvm/test/MC/Mips/mips32r2/
Dvalid-fp64.s24 mthc1 $4, $f0 # CHECK: mthc1 $4, $f0 # encoding: [0x44,0xe4,0x00,0x00] label
/external/llvm-project/llvm/test/MC/Mips/mips32r5/
Dvalid-fp64.s24 mthc1 $4, $f0 # CHECK: mthc1 $4, $f0 # encoding: [0x44,0xe4,0x00,0x00] label
/external/llvm-project/llvm/test/MC/Mips/mips32r3/
Dvalid-fp64.s24 mthc1 $4, $f0 # CHECK: mthc1 $4, $f0 # encoding: [0x44,0xe4,0x00,0x00] label
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dvalid-fp64.s29 mthc1 $4, $f0 # CHECK: mthc1 $4, $f0 # encoding: [0x54,0x80,0x38,0x3b] label
/external/llvm-project/llvm/test/CodeGen/Mips/Fast-ISel/
Dsimplestorefp1.ll38 ; mips32r2: mthc1 $[[REG2a]], $f[[REG3]]
/external/llvm/test/MC/Mips/
Dmicromips-fpu-instructions.s57 # CHECK-EL: mthc1 $6, $f8 # encoding: [0xc8,0x54,0x3b,0x38]
122 # CHECK-EB: mthc1 $6, $f8 # encoding: [0x54,0xc8,0x38,0x3b]
183 mthc1 $6, $f8

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