| /external/llvm-project/llvm/test/CodeGen/Generic/ |
| D | print-arith-fp.ll | 34 %mul_s = getelementptr [12 x i8], [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
39 call i32 (i8*, ...) @printf( i8* %mul_s, double %mul_r ) ; <i32>:5 [#uses=0]
|
| D | print-arith-int.ll | 39 %mul_s = getelementptr [12 x i8], [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
44 call i32 (i8*, ...) @printf( i8* %mul_s, i32 %mul_r ) ; <i32>:5 [#uses=0]
|
| /external/llvm/test/CodeGen/Generic/ |
| D | print-arith-fp.ll | 34 %mul_s = getelementptr [12 x i8], [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
39 call i32 (i8*, ...) @printf( i8* %mul_s, double %mul_r ) ; <i32>:5 [#uses=0]
|
| D | print-arith-int.ll | 39 %mul_s = getelementptr [12 x i8], [12 x i8]* @mul_str, i64 0, i64 0 ; <i8*> [#uses=1]
44 call i32 (i8*, ...) @printf( i8* %mul_s, i32 %mul_r ) ; <i32>:5 [#uses=0]
|
| /external/llvm-project/llvm/test/MC/Mips/micromips-dspr2/ |
| D | valid.s | 115 mul_s.ph $1, $2, $3 # CHECK: mul_s.ph $1, $2, $3 # encoding: [0x00,0x62,0x0c,0x2d]
|
| /external/llvm/test/MC/Mips/micromips-dspr2/ |
| D | valid.s | 115 mul_s.ph $1, $2, $3 # CHECK: mul_s.ph $1, $2, $3 # encoding: [0x00,0x62,0x0c,0x2d]
|
| /external/llvm/test/MC/Mips/dspr2/ |
| D | valid.s | 94 …mul_s.ph $18, $19, $20 # CHECK: mul_s.ph $18, $19, $20 # encoding: [0x7e,0x74,0…
|
| /external/llvm-project/llvm/test/MC/Mips/dspr2/ |
| D | valid.s | 94 …mul_s.ph $18, $19, $20 # CHECK: mul_s.ph $18, $19, $20 # encoding: [0x7e,0x74,0…
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.h | 243 void mul_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
|
| D | IceInstMIPS32.cpp | 1060 Asm->mul_s(getDest(), getSrc(0), getSrc(1)); in emitIAS()
|
| D | IceAssemblerMIPS32.cpp | 938 void AssemblerMIPS32::mul_s(const Operand *OpFd, const Operand *OpFs, in mul_s() function in Ice::MIPS32::AssemblerMIPS32
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips-dspr2/ |
| D | valid.txt | 114 0x00 0x62 0x0c 0x2d # CHECK: mul_s.ph $1, $2, $3
|
| /external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/ |
| D | valid.txt | 114 0x00 0x62 0x0c 0x2d # CHECK: mul_s.ph $1, $2, $3
|
| /external/llvm-project/llvm/test/MC/Disassembler/Mips/dspr2/ |
| D | valid.txt | 92 0x7e 0x74 0x93 0x98 # CHECK: mul_s.ph $18, $19, $20
|
| /external/llvm/test/MC/Disassembler/Mips/dspr2/ |
| D | valid.txt | 92 0x7e 0x74 0x93 0x98 # CHECK: mul_s.ph $18, $19, $20
|
| /external/llvm-project/mlir/test/Dialect/Linalg/ |
| D | sparse_1d.mlir | 172 // CHECK-LABEL: func @mul_s(
193 func @mul_s(%arga: tensor<32xf32>, %argb: f32) -> tensor<32xf32> {
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| D | invalid-dspr2.s | 76 …mul_s.ph $10,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
|
| /external/llvm-project/llvm/test/MC/Mips/mips32r2/ |
| D | invalid-dspr2.s | 76 …mul_s.ph $10,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
|
| /external/llvm/test/CodeGen/Mips/ |
| D | dsp-r2.ll | 356 ; CHECK: mul_s.ph
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | dsp-r2.ll | 356 ; CHECK: mul_s.ph
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsDSPInstrInfo.td | 114 class MUL_S_PH_MMR2_ENC : POOL32A_3R_FMT<"mul_s.ph", 0b10000101101>;
|
| D | MipsDSPInstrInfo.td | 1017 class MUL_S_PH_DESC : ADDUH_QB_DESC_BASE<"mul_s.ph", int_mips_mul_s_ph,
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MicroMipsDSPInstrInfo.td | 113 class MUL_S_PH_MMR2_ENC : POOL32A_3R_FMT<"mul_s.ph", 0b10000101101>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MicroMipsDSPInstrInfo.td | 113 class MUL_S_PH_MMR2_ENC : POOL32A_3R_FMT<"mul_s.ph", 0b10000101101>;
|
| D | MipsDSPInstrInfo.td | 1031 class MUL_S_PH_DESC : ADDUH_QB_DESC_BASE<"mul_s.ph", int_mips_mul_s_ph,
|