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Searched refs:mulhi (Results 1 – 21 of 21) sorted by relevance

/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterContextFreeBSD_mips64.cpp74 uint64_t mulhi; member
DRegisterContext_mips.h278 uint64_t mulhi; member
DRegisterInfos_mips64.h182 DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64,
263 DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips64, dwarf_hi_mips64,
DRegisterInfos_mips.h147 DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips, dwarf_hi_mips,
/external/rust/crates/rand/src/distributions/
Dutils.rs172 ($ty:ident, $intrinsic:ident, $mulhi:ident, $mullo:ident) => {
180 let hi = $ty::from_bits(unsafe { $mulhi(a, b) });
/external/llvm/test/CodeGen/AMDGPU/
Dmul_uint24.ll55 ; FIXME: SI support 24-bit mulhi
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dmul_uint24-amdgcn.ll176 %mulhi = trunc i32 %hi to i16
177 store i16 %mulhi, i16 addrspace(1)* %out
Dmul_int24.ll60 ; multiple uses by the separate mul and mulhi.
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td122 def SDTIntBinHiLoOp : SDTypeProfile<2, 2, [ // mulhi, mullo, sdivrem, udivrem
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td124 def SDTIntBinHiLoOp : SDTypeProfile<2, 2, [ // mulhi, mullo, sdivrem, udivrem
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SchedThunderX3T110.td73 // Integer divide/mulhi micro-ops only on port I1.
/external/llvm-project/llvm/include/llvm/Target/
DTargetSelectionDAG.td124 def SDTIntBinHiLoOp : SDTypeProfile<2, 2, [ // mulhi, mullo, sdivrem, udivrem
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/
DREADME.txt664 being a mulhi to being a mul lo (cheaper). Testcase:
/external/llvm-project/llvm/lib/Target/
DREADME.txt664 being a mulhi to being a mul lo (cheaper). Testcase:
/external/llvm/lib/Target/
DREADME.txt664 being a mulhi to being a mul lo (cheaper). Testcase:
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen3083 nvvm_mulhi_i, // llvm.nvvm.mulhi.i
3084 nvvm_mulhi_ll, // llvm.nvvm.mulhi.ll
3085 nvvm_mulhi_ui, // llvm.nvvm.mulhi.ui
3086 nvvm_mulhi_ull, // llvm.nvvm.mulhi.ull
9141 "llvm.nvvm.mulhi.i",
9142 "llvm.nvvm.mulhi.ll",
9143 "llvm.nvvm.mulhi.ui",
9144 "llvm.nvvm.mulhi.ull",
17081 1, // llvm.nvvm.mulhi.i
17082 1, // llvm.nvvm.mulhi.ll
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen3083 nvvm_mulhi_i, // llvm.nvvm.mulhi.i
3084 nvvm_mulhi_ll, // llvm.nvvm.mulhi.ll
3085 nvvm_mulhi_ui, // llvm.nvvm.mulhi.ui
3086 nvvm_mulhi_ull, // llvm.nvvm.mulhi.ull
9141 "llvm.nvvm.mulhi.i",
9142 "llvm.nvvm.mulhi.ll",
9143 "llvm.nvvm.mulhi.ui",
9144 "llvm.nvvm.mulhi.ull",
17081 1, // llvm.nvvm.mulhi.i
17082 1, // llvm.nvvm.mulhi.ll
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen3083 nvvm_mulhi_i, // llvm.nvvm.mulhi.i
3084 nvvm_mulhi_ll, // llvm.nvvm.mulhi.ll
3085 nvvm_mulhi_ui, // llvm.nvvm.mulhi.ui
3086 nvvm_mulhi_ull, // llvm.nvvm.mulhi.ull
9141 "llvm.nvvm.mulhi.i",
9142 "llvm.nvvm.mulhi.ll",
9143 "llvm.nvvm.mulhi.ui",
9144 "llvm.nvvm.mulhi.ull",
17081 1, // llvm.nvvm.mulhi.i
17082 1, // llvm.nvvm.mulhi.ll
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen3083 nvvm_mulhi_i, // llvm.nvvm.mulhi.i
3084 nvvm_mulhi_ll, // llvm.nvvm.mulhi.ll
3085 nvvm_mulhi_ui, // llvm.nvvm.mulhi.ui
3086 nvvm_mulhi_ull, // llvm.nvvm.mulhi.ull
9141 "llvm.nvvm.mulhi.i",
9142 "llvm.nvvm.mulhi.ll",
9143 "llvm.nvvm.mulhi.ui",
9144 "llvm.nvvm.mulhi.ull",
17081 1, // llvm.nvvm.mulhi.i
17082 1, // llvm.nvvm.mulhi.ll
[all …]
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen3077 nvvm_mulhi_i, // llvm.nvvm.mulhi.i
3078 nvvm_mulhi_ll, // llvm.nvvm.mulhi.ll
3079 nvvm_mulhi_ui, // llvm.nvvm.mulhi.ui
3080 nvvm_mulhi_ull, // llvm.nvvm.mulhi.ull
9101 "llvm.nvvm.mulhi.i",
9102 "llvm.nvvm.mulhi.ll",
9103 "llvm.nvvm.mulhi.ui",
9104 "llvm.nvvm.mulhi.ull",
16986 1, // llvm.nvvm.mulhi.i
16987 1, // llvm.nvvm.mulhi.ll
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc4570 "llvm.nvvm.mulhi.i",
4571 "llvm.nvvm.mulhi.ll",
4572 "llvm.nvvm.mulhi.ui",
4573 "llvm.nvvm.mulhi.ull",
14703 1, // llvm.nvvm.mulhi.i
14704 1, // llvm.nvvm.mulhi.ll
14705 1, // llvm.nvvm.mulhi.ui
14706 1, // llvm.nvvm.mulhi.ull