| /external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ |
| D | mul.ll | 93 ; MIPS32-NEXT: multu $6, $3
122 ; MIPS32-NEXT: multu $6, $14
134 ; MIPS32-NEXT: multu $7, $14
136 ; MIPS32-NEXT: multu $6, $13
161 ; MIPS32-NEXT: multu $8, $14
163 ; MIPS32-NEXT: multu $7, $13
165 ; MIPS32-NEXT: multu $6, $12
185 ; MIPS32-NEXT: multu $4, $5
|
| /external/capstone/suite/MC/Mips/ |
| D | mips-dsp-instructions.s.cs | 25 0x00,0x85,0x10,0x19 = multu $ac2, $a0, $a1
35 0x00,0x85,0x00,0x19 = multu $a0, $a1
|
| /external/llvm-project/llvm/test/MC/Mips/ |
| D | mul-macro-variants.s | 95 # CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
101 # CHECK-TRAP: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
106 # CHECK: multu $5, $6 # encoding: [0x00,0xa6,0x00,0x19]
112 # CHECK-TRAP: multu $5, $6 # encoding: [0x00,0xa6,0x00,0x19]
|
| D | micromips-alu-instructions.s | 38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
81 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
122 multu $9, $7
|
| D | mips64-alu-instructions.s | 83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
|
| D | mips-alu-instructions.s | 87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-alu-instructions.s | 38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
81 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
122 multu $9, $7
|
| D | mips64-alu-instructions.s | 83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
|
| D | mips-alu-instructions.s | 87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | 2008-08-01-AsmInline.ll | 8 ; CHECK: multu
11 …%asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwi…
|
| D | mulll.ll | 13 ; 16: multu ${{[0-9]+}}, ${{[0-9]+}}
|
| D | mulull.ll | 14 ; 16: multu ${{[0-9]+}}, ${{[0-9]+}}
|
| /external/llvm/test/CodeGen/Mips/ |
| D | 2008-08-01-AsmInline.ll | 8 ; CHECK: multu
11 …%asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwi…
|
| D | mulll.ll | 13 ; 16: multu ${{[0-9]+}}, ${{[0-9]+}}
|
| D | mulull.ll | 14 ; 16: multu ${{[0-9]+}}, ${{[0-9]+}}
|
| /external/llvm-project/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips1.s | 23 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
24 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips2.s | 29 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
30 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips1.s | 23 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
24 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips2.s | 29 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
30 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 22 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
23 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips1.s | 26 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
27 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm-project/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 22 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
23 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips1.s | 26 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
27 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/dsp/ |
| D | valid.s | 78 …multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x…
80 …multu $4, $5 # CHECK: multu $4, $5 # encoding: [0x00,0x…
|
| /external/llvm-project/llvm/test/MC/Mips/dsp/ |
| D | valid.s | 78 …multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x…
80 …multu $4, $5 # CHECK: multu $4, $5 # encoding: [0x00,0x…
|